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yaga_3967241
Level 3
Level 3
50 sign-ins 25 sign-ins 10 replies posted

Hi,

We are using PSoC LP5, with bootloader and bootloadable. There are two ways to enter bootloader mode:

  1. Provide power to PSoC (Power on reset).
  2. After PSoC bootup to bootloadable, call Bootloadable_Load() from bootloadable.

How to detect by which way bootloader is entered?

Regards,

Winston

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1 Solution
BiBi_1928986
Level 7
Level 7
First comment on blog 500 replies posted 250 replies posted

Hello.

Pacr is pointing you in the right direction of using CyResetStatus.  I'll add to his suggestion.

Depending on your requirements, i.e., does the bootloadable also need to know if it was restarted from POR or from calling Bootloadable_Load(), have a look at this thread which addresses this.
Solved: Reading the correct reset status from a bootloadbl... - Infineon Developer Community
And, how it is further described in AN233957 app note:
Why reset status is always set as software reset i... - Infineon Developer Community

Open both the Arch TRM and Register TRM and do a word search for RESET_SR0.  This is the register which the bootloader reads and makes a copy into the global variable CyResetStatus.  There, you'll find definitions of the bits in RESET_SR0 (aka CyResetStatus).

BTW, RESET_SR0 also has 2 user defined bits which can be used to communicate status/states between bootloader and bootloadable.  These bits (bit7, bit6) can be set/cleared by sw, and only cleared by a hardware reset.  A sw reset does not clear these bits.  Very useful!

You'll also find more detail on using RESET_SR0 in the PSoC Creator PSoC3/PSoC5LP System Reference Guide.  Do a word search for both RESET_SR0 and for CyResetStatus.

View solution in original post

2 Replies
pacr_284376
Level 5
Level 5
100 replies posted 10 solutions authored 50 sign-ins

You can use CyResetStatus to readout the reason of the last reset. You can for example detect software reset, hardware reset or reset by Watchdog timer.

BiBi_1928986
Level 7
Level 7
First comment on blog 500 replies posted 250 replies posted

Hello.

Pacr is pointing you in the right direction of using CyResetStatus.  I'll add to his suggestion.

Depending on your requirements, i.e., does the bootloadable also need to know if it was restarted from POR or from calling Bootloadable_Load(), have a look at this thread which addresses this.
Solved: Reading the correct reset status from a bootloadbl... - Infineon Developer Community
And, how it is further described in AN233957 app note:
Why reset status is always set as software reset i... - Infineon Developer Community

Open both the Arch TRM and Register TRM and do a word search for RESET_SR0.  This is the register which the bootloader reads and makes a copy into the global variable CyResetStatus.  There, you'll find definitions of the bits in RESET_SR0 (aka CyResetStatus).

BTW, RESET_SR0 also has 2 user defined bits which can be used to communicate status/states between bootloader and bootloadable.  These bits (bit7, bit6) can be set/cleared by sw, and only cleared by a hardware reset.  A sw reset does not clear these bits.  Very useful!

You'll also find more detail on using RESET_SR0 in the PSoC Creator PSoC3/PSoC5LP System Reference Guide.  Do a word search for both RESET_SR0 and for CyResetStatus.