Sep 15, 2021
11:54 PM
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Sep 15, 2021
11:54 PM
How can Change Filter Co-eff During Run Time in PSOC5 LP Filter Block? any Examples
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PSOC5 LP MCU
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Sep 16, 2021
09:05 PM
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Sep 16, 2021
09:05 PM
Hi,
Please checkout one way to do it. A function can be written for the purpose.
NOTE: Using this function requires the filter component to be set up with the same type of filter (biquad or FIR) and number of taps/order as the coefficients being loaded here. */ void Filter_LoadCoefficients(uint8 *pFiltCoeffs, uint16 wSize, uint16 wOffset) { /* This is the externally defined null array we will use to clear out the sample data in RAM */ extern const uint8 CYCODE Filter_data_a[]; /* Power on DFB before initializing the RAMs */ Filter_PM_ACT_CFG_REG |= Filter_PM_ACT_MSK; /* Turn off Run Bit */ Filter_CR_REG &= ~Filter_RUN_MASK; /* Enable the DFB RAMS */ Filter_RAM_EN_REG = Filter_RAM_DIR_BUS; /* Put DFB RAM on the bus */ Filter_RAM_DIR_REG = Filter_RAM_DIR_BUS; /* DAta RAMs */ /* Clear out the RAM which contains the sample values from the previously operating filter */ memcpy(Filter_DA_RAM, Filter_data_a, Filter_DA_RAM_SIZE); /* This one copies wSize bytes of filter coefficients at the specified offset in the data B RAM */ memcpy(Filter_DB_RAM+wOffset, pFiltCoeffs, wSize); /* Take DFB RAM off the bus */ Filter_RAM_DIR_REG = Filter_RAM_DIR_DFB; /* Set up interrupt and DMA events */ // Filter_SetInterruptMode(Filter_INIT_INTERRUPT_MODE); // Filter_SetDMAMode(Filter_INIT_DMA_MODE); /* Clear any pending interrupts */ /* Bits [2..0] of this register are readonly. */ Filter_SR_REG = 0xf8; }
Best Regards,
Vasanth
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