Generation of multiple synchronized clock from PSOC5

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MSSa_1300736
Level 1
Level 1
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Hi,

I want to design a hardware which can output Multiple SYNCHRONIZED clocks at low and high frequencies (from KHz to MHz) to particular unit. On successfully doing this I’ll able to get analog data from that unit which I want to convert into digital and acquire to pc through USB interface.

As I am new to psoc environment, please let me know is it possible to perform above task with only PSOC5?

Can I generate multiple synchronized clocks of different frequencies from PSOC5’s PLL and ILO?

I am attaching block diagram here for reference.BD.PNG

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

MSSa,

PLL and ILO are not synchronized. But PSoC5 can supply multiple synchronized clocks derived from PLL/MASTER_CLOCK. Internal clock divider is 16-bit, so starting with 48Hz MASTER_CLOCK one can derive clock as low as  ~740 Hz. To assist you better, please describe exactly what clocks are required for operating your custom analog block.

/odissey1

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3 Replies
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

MSSa,

PLL and ILO are not synchronized. But PSoC5 can supply multiple synchronized clocks derived from PLL/MASTER_CLOCK. Internal clock divider is 16-bit, so starting with 48Hz MASTER_CLOCK one can derive clock as low as  ~740 Hz. To assist you better, please describe exactly what clocks are required for operating your custom analog block.

/odissey1

Hi BoTa,

Thanks for reply!

Clock requirements are from Hz range to MHz range. Actually I want to design generalized data acquisition system in which External unit is variable so accordingly clocking frequency is variable.

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