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Hello Everybody,
I am dealing with very very small signals ( something near the mV or uV scale) and I need amplify it using an PGA. The problem is that the maximum gain available is 50 and it still not enough. I already tried to connect one PGA output in the input of another, but the results were totally unexpected and something random ( at least for me) even when both gain were just 1. Someone has some hint what is happening or what can be done?
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PSoC 5LP
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Daniel,
are you looking to measure DC or AC signal?
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I am looking to measure DC signal.
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Depending on how you use PGA you may have to bias it up so
thats its output falls into its CM range.
If you are handling very small signals then you have to be fully aware
of offset, noise considerations. Here is one approach to the problem -
http://www.cypress.com/?rID=49159 AN66444 - PSoC® 3 and PSoC 5LP Correlated Double Sampling to Reduce Offset, Drift, and Low Frequency Noise
Regards, Dana.
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Ok, I am going to take a look at these techniques that you said. Thank you Dana!
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I thought that the offset could be the reason of the voltage discrepancy, but I am not sure how to measure it in psoc 5LP. I tried to use inverted PGA but with this I got another problem. The inverted PGA does not accept internal Vref, and when I try to use external Vref = Ground ( the external ground pin of psoc) the results are totally strange ( even if I use just 1 single inverted PGA ). But when I use just 1 PGA with Vref = internal Vss everything works fine. As you said, I will start to considerate using other approaches like using the differential measurement or DelSigADC or using the techniques said by Dana. If I got any new advancements I will post. Thanks for the hints!
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One other solution is to use a high performance IA external to PSOC. They
are laser trimmed at factory, have very high G, excellent CMRR. Analog
devices leader in that area.
Regards, Dana.
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I am avoiding to use external components of PSoC, because I want to develop a compact circuit. And since I am new on psoc development I want to learn what I am doing wrong.
Regards, Daniel.
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At first the signal is coming from the Vdd of the PSoC, and I divide the voltage among some resistors of 10Kohms and 330Kohms to reduce it. The resulting voltage is something near 16mV, but as this is going to be a prototype I intend to get smaller signals after getting this worked. I will try to use the DelSig ADC and the Offset Compensation Technique that you said. Thanks for the hints!
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There is a fairly simple method to proceed to establish how much G
you need.
1) Start with desired output, max you want. For sake of argument pick 1 V.
2) Choose resolution you want at full scale. Again as example pick 1 mV.
3) Then rough A/D size is ~10 bits.
4) Do you have high CM environment, like a bridge. If so then solution
should have a differential amp at beginning of signal chain. If not single
ended is fine.
5) Let Vmaxsensor =~ 1 mV.
6) Now Gtot = 1 V max out / Vmaxsensor ~= 1000.
7) 1 LSB on A/D, input referred, is now 1 uV. If that’s not low enough increase
the # bits of A/D, or use averaging in SW to increase effective ENOB of A/D.
😎 Take as much G as you can at sensor end of signal chain, for noise and
S/N considerations. The remaining G you take in the rest of the signal path, in
this case the A/D buffer G. Note if you take G via A/D buffer, its side consequence
is the A/D input CM range is no longer R-R. Its roughly 100 mV off the rails.
So that reduces total CM range in the design. Also keep in mind because it is a
buffer if you use it you do not have to be concerned about prior stage loading.
9) Do a noise analysis to determine what the effective S/N is going to be in
final design.
10) When working with low level signals you have to be very concerned with
drift, offsets, layout, especially if seeking absolute accuracy. So do an end to end
analysis of errors, offset, drift, temp, PSRR, CMR……to do the job right. The way
to do that is extensive use of superposition and normalize all errors to a common
reference, like PPM, or V, or %, or LSBs (which is ultimately what you want).......
and add them up.
This is a bit oversimplified but you get the idea.
Some useful ref material –
https://www.dropbox.com/s/ruaf9booe17jk8n/PCB%20Layout.zip?dl=0
https://www.dropbox.com/s/2h96beh1fbvz4e2/noise_notes.zip?dl=0
Regards, Dana.
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After some tests I can confirm that the output voltage discrepancy become from the DC offset. I guess It just needs to be configured, but I don't know how to clear up the offset in PSoC creator, considering that the PGA is built on-chip. In off-chip PGA I could just use a potentiometer in the offset pins and all could be resolved. Any ideas ?
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You can use the article that odissey1 posted earlier (quite simple and effective),
or use CDS link I posted.
Or use mux, switch a known V into A/D, measure the offset, and use an IDAC
to inject a current into PGA input to null the offset out.
Or use a mux, a bare PSOC OpAmp, mux your own G R's, and traditional offset potentiometer
at the summing junction.
Regards, Dana.