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PSoC™ 5, 3 & 1 Forum Discussions

DaHu_285096
Level 5
Level 5
10 likes received 250 replies posted 100 replies posted

I understand that when PSOC 5LP is in Reset, all the GPIO are high impedance.

Are the GPIO also all high impedance for a new device that has not yet been programmed (not being held in reset state).

I have an H bridge and the Top and Bottom FETS are switching ON before I manage to program the 5LP. Once I have let out a bit of smoke and the device is programmed, it is ok (starts up and resets ok).

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1 Solution
Rakshith
Moderator
Moderator
Moderator
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Hi DaHu_285096​,

Yes, the GPIOs are in analog high impedance drive mode even for a new device.

Please note that a high impedance state does not mean that it is 0. The pin is just left floating. So, there might be some stray charges that could have turned one of the FETs ON.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B

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3 Replies
Rakshith
Moderator
Moderator
Moderator
1000 replies posted 750 replies posted 500 replies posted

Hi DaHu_285096​,

Yes, the GPIOs are in analog high impedance drive mode even for a new device.

Please note that a high impedance state does not mean that it is 0. The pin is just left floating. So, there might be some stray charges that could have turned one of the FETs ON.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

DaHu,

If this mode you speak of is undesirable, you might want to put a very resistance value resistor (100K) on the inputs to the FETs.  This resistor would be tied to GND or power depending on which bias voltage would prevent the FET from turning on.

Len

Len
"Engineering is an Art. The Art of Compromise."

Thanks for your reply.

I have added pull up and down resistors to the circuit. For the P chan and N Chan Fets.

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