I am trying to stop a DMA transfer at a specific moment using the trq pin.
As nowhere in the documentation a timing diagram is shown with the trq input, i've used a clock on the trq signal until the nrq is generated.
But this creates some problems:
- when i use the trq as mentioned above i have 2 extra transfers than i should ( i am using an analyzer on the drq line)
- without the trq i do not have this behaviour
Is there any changes that the trq might force more transfers?
Please have a look at this thread - https://community.cypress.com/t5/PSoC-General/How-do-I-GUARANTEE-input-termination-of-DMA-using-TRQ-...
We are investigating this issue internally regarding the trq signal and will update once we find the root cause.