I have been working on PSoC 5LP for a while, PSoC is quite powerful but it takes a lot of efforts to know the details... The DFB is another complex unit. I disassembled the FIR code generated by the Filter component, so I can test it with the DFB Assembler. I put some comments on it based on my understanding with the DFB module, I might be wrong... Here is the assembly code:
// Copyright 2008-2013, Cypress Semiconductor Corporation. All rights reserved.// Filter coefficients are stored in RAM-Barea acu // 16 taps dw 0x0F0F // mreg dw 0x0000 // lreg dw 0x0000 // initial value for ACU-A.reg area data_b // 16 taps dw 0x00E168 dw 0x00432A // add another 14 taps here... initial: // Enable modulus arithmetic acu(setmod,setmod) dmux(sa,sa) alu(set0) mac(clra) acu(clear,clear) dmux(sa,sa) alu(hold) mac(hold) jmp(eob, wait_for_data) wait_for_data: // Wait input from stage-A(in1) for the next element acu(hold,hold) dmux(sa,sa) alu(hold) mac(hold) jmpl(in1,load_data) load_data: // Load (mreg,lreg) with (acu[0],acu[1]) acu(loadm,loadm) addr(0) dmux(sa,sa) alu(hold) mac(hold) acu(loadl,loadl) addr(1) dmux(sa,sa) alu(hold) mac(hold) // Open the channel from stage-A(addr(1)) to RAM-A at mux1a
acu(hold,hold) addr(1) dmux(ba,sa) alu(hold) mac(hold) // Write data to RAM-A, modify mux, load acu-A with acu[2] acu(read,clear) addr(2) dmux(sra,sra) alu(setb) mac(clra) write(da) jmp(eob, calc) write_bus: // Write acu[2] with acu-A.reg acu(write,clear) addr(2) dmux(sa,srm) alu(setb) mac(hold) acu(hold,hold) dmux(sa,sa) alu(hold) mac(hold) // Write shifter output to the bus' holding register A with addr(1) acu(hold,hold) addr(1) dmux(sa,sa) alu(hold) mac(hold) write(abus) jmp(eob, wait_for_data) calc: // Multiplication acu(incr,incr) dmux(sra,srm) alu(setb) mac(macc) jmpl(eob, acubeq, write_bus)
