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I was looking to be able to use a USART in my application. Does any of the PSoC devives do this or is there a way it can be done.
thanks
ScottC
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Hello.
From what I know about the PSoC families, no, none of them implement a USART. They only have UART capability.
Could a USART be implemented? Absolutely. Just need a PSoC with programmable UDB blocks, preferably PSoC 5LP. It might not fit into a PSoC4 (fewer UDB blocks).
Could use the SPI interface to clock in/out the data bits, but s/w would have to do the framing search etc.
I'm sure there will be USART macro's available on the web. UDB's can be programmed using Verilog (or schematic driven). A few Cypress UDB application papers: AN82250, AN82156.
PSoC Creator - Implementing Programmable Logic Designs with Verilog (infineon.com)
Designing PSoC Creator Components with UDB Datapaths (infineon.com)
It would be easier/faster to use something like the Intel 8251A USART or the more capable Zilog Z8530 (depending on your needs). These parts would also be good to bench test against something implemented with UDB's (if you decide to go that way).
Not sure if this helps or not. Gives you something to think about.
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Hello.
From what I know about the PSoC families, no, none of them implement a USART. They only have UART capability.
Could a USART be implemented? Absolutely. Just need a PSoC with programmable UDB blocks, preferably PSoC 5LP. It might not fit into a PSoC4 (fewer UDB blocks).
Could use the SPI interface to clock in/out the data bits, but s/w would have to do the framing search etc.
I'm sure there will be USART macro's available on the web. UDB's can be programmed using Verilog (or schematic driven). A few Cypress UDB application papers: AN82250, AN82156.
PSoC Creator - Implementing Programmable Logic Designs with Verilog (infineon.com)
Designing PSoC Creator Components with UDB Datapaths (infineon.com)
It would be easier/faster to use something like the Intel 8251A USART or the more capable Zilog Z8530 (depending on your needs). These parts would also be good to bench test against something implemented with UDB's (if you decide to go that way).
Not sure if this helps or not. Gives you something to think about.
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Thank you for your quick response ... i have never used Verilog but would like to learn.
thanks
ScottC