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Smk74
Level 1
Level 1
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I have a question about the CY8C36 family.
1. When using ADC, internal Vref can be set to 6x, but is it structurally 6x using PGA?
2. I think it is suppressed to less than headroom (about 4.75V) at full scale, but I would like to know why Vref=1.024→6.144V can be calculated when converting ADC code to actual measured value.
3. In this case, can we consider Vref accuracy as 0.3% x 6?

Thank you in advance.

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Maragani
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50 replies posted 5 solutions authored 100 sign-ins

Hi @Smk74 

Please check below reply to your questions. 

1. When using ADC, internal Vref can be set to 6x, but is it structurally 6x using PGA?

-> Vref is scaled to 6 Times, 2 times , using gain amplifier.  And also Unity Gain will give you best results, as the gain increases the error also increases which present in the Vref Voltage. The 1.024-V reference yields the best accuracy among the internal references available in PSoC 3. You can add an external capacitor on port 0[3] or port 3[2] to decrease the reference noise.

Maragani_0-1707544360904.png


2. I think it is suppressed to less than headroom (about 4.75V) at full scale, but I would like to know why Vref=1.024→6.144V can be calculated when converting ADC code to actual measured value.

-> You can measure VADC range of 6V as mentioned by @wmaxfield  in his reply. The same is provided in the data sheet electrical specifications. 


3. In this case, can we consider Vref accuracy as 0.3% x 6?

-> To get better accuracy of Vref you have to provide bypass capacitors based on the designs.

-> .3%*6 will be occurred at highest Temperature Range. 

Maragani_1-1707547813600.pngMaragani_2-1707547942470.png

 

Please check the attached. 

 

Thanks

Sateesh M

 

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wmaxfield
Level 4
Level 4
10 replies posted 10 likes received 5 questions asked

You are correct.  The top voltage is your VDDA voltage, which has to be the highest voltage in the system.

The readings can be done as if 6 volts is measurable, because of the multiplication of the reference voltage in the hardware.  However, it is not, but it will act like it until you hit the maximum power supply voltage.  

In other words, the internal circuitry is designed as if 6 volts was available.  That gives you a very wide range on the input, sacrificing LSB sensitivity.  If you are using VDDA/2 as a reference, then your readings will also be noisy, because power supplies are noisy.

You can run several experiments on it to see how it acts with input voltages using a center tap potentiometer and the PSOC Creator debugger.

 

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Maragani
Moderator
Moderator
Moderator
50 replies posted 5 solutions authored 100 sign-ins

Hi @Smk74 

Please check below reply to your questions. 

1. When using ADC, internal Vref can be set to 6x, but is it structurally 6x using PGA?

-> Vref is scaled to 6 Times, 2 times , using gain amplifier.  And also Unity Gain will give you best results, as the gain increases the error also increases which present in the Vref Voltage. The 1.024-V reference yields the best accuracy among the internal references available in PSoC 3. You can add an external capacitor on port 0[3] or port 3[2] to decrease the reference noise.

Maragani_0-1707544360904.png


2. I think it is suppressed to less than headroom (about 4.75V) at full scale, but I would like to know why Vref=1.024→6.144V can be calculated when converting ADC code to actual measured value.

-> You can measure VADC range of 6V as mentioned by @wmaxfield  in his reply. The same is provided in the data sheet electrical specifications. 


3. In this case, can we consider Vref accuracy as 0.3% x 6?

-> To get better accuracy of Vref you have to provide bypass capacitors based on the designs.

-> .3%*6 will be occurred at highest Temperature Range. 

Maragani_1-1707547813600.pngMaragani_2-1707547942470.png

 

Please check the attached. 

 

Thanks

Sateesh M

 

Smk74
Level 1
Level 1
First reply posted First like given First question asked

Thank you for your response

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