the situation gets weirder and weirder. TRM (page 398, chapter 38.2.1) says:
The input selection, both positive and negative, is made through the
input selection mux, which can be controlled through either
the SAR routing registers in the analog interface or through
the UDB. Setting the SARx_CSR bit takes the positive
input through UDB and clearing the bit takes the positive
input through registers. Similarly, setting the SARx_CSR
bit takes the negative input through UDB and clearing the bit
takes the negative input through registers.
So there is the attached project which attempts to do exactly that. It compiles with a bunch of warnings, e.g.
Warning: Can't find signal in jack map: Net_39_3
Warning: Signal Net_39_0: No path found from Net_39_0:macrocell.q to SAR_1.vn_ctl_udb_0
I don't see anything obviously wrong with the (not very sensible) project, so what's going on?
I want to dynamically reconfigure the ADC in flight, to switch between multiple differential and single-ended channels. I also want to use the parallel output of the ADC for rapid range checking.
There are several reasons for not using the customizer:
1. No hardware mux control signals are available to the end user.
2. No parallel output signals are available to the end user.
3. The UDB clock signal is not available to the end user.
4. The generated software files do not support the abovementioned features, neither do they support: sampling time configuration (hardcoded to 4), power mode selection, coherency and overrun configuration and it assumes I want an interrupt.
I want to do rather advanced stuff with the ADC, so the high-level component in its present form is best to be avoided.
Piotr, in this case it might be easyer to build new ADC component from scratch using underlying primitives. For ADC bus output you may look at this example.