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PSoC™ 5, 3 & 1 Forum Discussions

alro_2373731
Level 1
Level 1

I am running the  ADC_SAR_Seq Example project as is with no modifications.  I have the 5/3.3v selector on the psoc5lp dvk set to 5v as instructed.  When reading the voltages on the DAC pins with a multimeter they read dead on however the LCD screen reads them slightly off.  Here are my results

DAC SettingLCD DISPLAYMultimeter reading
0.192 V0.22 V0.192 V
0.400 V0.44 V0.400 V
0.592 V0.67 V0.592 V
0.800 V0.88 V0.800 V
4.000 V (Custom)4.28 V3.999 V

Hopefully I am missing something simple.... any ideas?  Also, no need to attach the project as its from the code example.  running psoc create 4.2

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1 Solution
Len_CONSULTRON
Level 9
1000 replies posted 750 replies posted 500 likes received
Level 9

Dac SettingLCD DisplayMultimeter reading

LCD Display

(with 4.8V Vref correction)

LCD Display

(with 4.54V Vref correction)

0.192 V0.22 V0.192 V0.2112 V0.200 V
0.400 V0.44 V0.400 V

0.4224 V

0.400 V
0.592 V0.67 V0.592 V0.6432 V0.609 V
0.800 V0.88 V0.800 V0.8448 V0.800 V
4.000 V (Custom)4.28 V3.999 V

4.1088

3.891 V

There are other error sources (ADC gain and offset), switch losses and others.

Using the 4.54V=Vref,  then the gain correction is 4.54V/5.0V = 0.91.   (The 5.0V is the assumed reference for the ADC_SAR_Seq adc_cnt to mvolt conversion.)

I find the PSoC ADC (as well as DAC) functionality to be superior but not perfect.  If you need much high accuracy, you may need to result in external devices with VERY careful layout considerations.  As it stands, for a mixed-signal device with digital and analog on the same silicon, I find the PSoC my go-to device.

Having said that, there a number of things you can do to improve accuracy:

  • Use the internal bandgap reference voltage (1.024V) instead of based off of Vdda.  Vdda can fluctuate based on the CPU and external circuit loading.  Using Vdda the loading and transients can add an effective noise source in the ADC ratiometric computation.  The internal bandgap reference is mostly immune to transient loading effects.  At its worst, the bandgap will change with thermal effects (ie ambient temperature, and CPU self-heating).  Even with thermal effect variances, the bandgap is still a much more stable reference.
    The downside of the bandgap is depending on the voltage range you need to support, you may need to use resistor-divider scaling to bring it into the input range of the ADC.  In this case the ADC_SAR_Seq in single-end mode allows a Bandgap*2 input range (=2.048V).
  • Use a gain and offset compensation algorithm after the adc_cnt to volt, mvolt or uvolt conversion.  The PSoC ADC_SAR component provides one,  I on the other hand prefer to perform a gain and offset calibration measurement then I store the calculated gain and offset in EEPROM for input correction (using floating point math).  With this technique I can usually achieve better than 1% accuracy.
  • There are always sources of noise specially are high ADC resolutions.  There are ways to minimize these effects:
    • Lower the ADC resolution.  If you ADC resolution is too high, you could be below the "noise floor".  Therefore transient noise will appear in your readings.
    • If you use a higher ADC resolution, truncate the mvolt result.  For example, if your raw mvolt reading provides +/- 1mV, truncate or round up to 10mV or 100mV.
    • Average your ADC readings over time if you can tolerate it.  This is in effect creating a Software low-pass filter.  This suggestion is based on your application.  If you need quick ADC answers, a many sample average will take time.
  • This suggestion is for the VDAC:  Be careful driving a low to medium impedance input.  VDACs have medium output impedance.  Having the medium output impedance VDAC driving a low to medium impedance input WILL pull down the VDAC output below the design setpoint.
    If this is the case, Place the VDAC output into a '+' input of a Opamp in 'follower' mode.  The Opamp has very high impedance inputs > 10Meg and the Opamp output in follower mode is very very close to the VDAC output.  Depending on which PSoC pins you use with the Opamp, you could drive 25mA (if needed) with minimal Opamp output voltage loss.

I hope this helps.

Len.

Len
"Engineering is an Art. The Art of Compromise."

View solution in original post

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3 Replies
Vasanth
Moderator
Moderator 250 sign-ins 500 solutions authored First question asked
Moderator

Hello Alex,


One thing you can check is to measure the VDDA voltage on your board. Is it exactly 5V ? If it is not go to CYDWR -> Systems tab. Under operating conditions you can enter the voltage at which the system is working. As your reference is derived from the VDDA, this may affect the result. The counts_to_mV/V/uV APIs provided with the component takes these values for calculation. This causes the errors in the result. th

Best Regards,
Vasanth

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Len_CONSULTRON
Level 9
1000 replies posted 750 replies posted 500 likes received
Level 9

Dac SettingLCD DisplayMultimeter reading

LCD Display

(with 4.8V Vref correction)

LCD Display

(with 4.54V Vref correction)

0.192 V0.22 V0.192 V0.2112 V0.200 V
0.400 V0.44 V0.400 V

0.4224 V

0.400 V
0.592 V0.67 V0.592 V0.6432 V0.609 V
0.800 V0.88 V0.800 V0.8448 V0.800 V
4.000 V (Custom)4.28 V3.999 V

4.1088

3.891 V

There are other error sources (ADC gain and offset), switch losses and others.

Using the 4.54V=Vref,  then the gain correction is 4.54V/5.0V = 0.91.   (The 5.0V is the assumed reference for the ADC_SAR_Seq adc_cnt to mvolt conversion.)

I find the PSoC ADC (as well as DAC) functionality to be superior but not perfect.  If you need much high accuracy, you may need to result in external devices with VERY careful layout considerations.  As it stands, for a mixed-signal device with digital and analog on the same silicon, I find the PSoC my go-to device.

Having said that, there a number of things you can do to improve accuracy:

  • Use the internal bandgap reference voltage (1.024V) instead of based off of Vdda.  Vdda can fluctuate based on the CPU and external circuit loading.  Using Vdda the loading and transients can add an effective noise source in the ADC ratiometric computation.  The internal bandgap reference is mostly immune to transient loading effects.  At its worst, the bandgap will change with thermal effects (ie ambient temperature, and CPU self-heating).  Even with thermal effect variances, the bandgap is still a much more stable reference.
    The downside of the bandgap is depending on the voltage range you need to support, you may need to use resistor-divider scaling to bring it into the input range of the ADC.  In this case the ADC_SAR_Seq in single-end mode allows a Bandgap*2 input range (=2.048V).
  • Use a gain and offset compensation algorithm after the adc_cnt to volt, mvolt or uvolt conversion.  The PSoC ADC_SAR component provides one,  I on the other hand prefer to perform a gain and offset calibration measurement then I store the calculated gain and offset in EEPROM for input correction (using floating point math).  With this technique I can usually achieve better than 1% accuracy.
  • There are always sources of noise specially are high ADC resolutions.  There are ways to minimize these effects:
    • Lower the ADC resolution.  If you ADC resolution is too high, you could be below the "noise floor".  Therefore transient noise will appear in your readings.
    • If you use a higher ADC resolution, truncate the mvolt result.  For example, if your raw mvolt reading provides +/- 1mV, truncate or round up to 10mV or 100mV.
    • Average your ADC readings over time if you can tolerate it.  This is in effect creating a Software low-pass filter.  This suggestion is based on your application.  If you need quick ADC answers, a many sample average will take time.
  • This suggestion is for the VDAC:  Be careful driving a low to medium impedance input.  VDACs have medium output impedance.  Having the medium output impedance VDAC driving a low to medium impedance input WILL pull down the VDAC output below the design setpoint.
    If this is the case, Place the VDAC output into a '+' input of a Opamp in 'follower' mode.  The Opamp has very high impedance inputs > 10Meg and the Opamp output in follower mode is very very close to the VDAC output.  Depending on which PSoC pins you use with the Opamp, you could drive 25mA (if needed) with minimal Opamp output voltage loss.

I hope this helps.

Len.

Len
"Engineering is an Art. The Art of Compromise."
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alro_2373731
Level 1
Level 1

Both of the answers above are correct. Trying both 9v and 12v power inputs on different tests, I measured VDDA and VDDD and set them in the IDE.  The outcome will suit exactly what I need to do.  This resulted in below.

DAC SettingLCD READING
0.192 V

0.21 V

0.400 V0.40 V
0.67 V0.65 V
4.0 V3.96 V
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