ADC_DMA_Filter

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dhgac_296796
Level 4
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Hello, 

   

   I am trying to implement a notch filter with 50 Hz. I followed the example shown in Filter_ADC_VDAC_polled and configured the same. However not getting results. Can anyone help

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dhgac_296796
Level 4
Level 4
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Sorry guys .. its fixed... I should connect EOS to drq instead of EOC.... 

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dhgac_296796
Level 4
Level 4
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I fixed for WaveDAC8_1_Start(); but still no results ..

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dhgac_296796
Level 4
Level 4
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Sorry guys .. its fixed... I should connect EOS to drq instead of EOC.... 

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dhgac_296796
Level 4
Level 4
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The design that was working few days back when I checked once, is found to be not working. I am getting ADC output but filtered output is not coming. Can anyone help?

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EvPa_264126
Level 7
Level 7
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it seems necessary to use  Filter_1_STAGEAH_PTR   for DMA  not  Filter_1_STAGEA_PTR

   


103     CyDmaTdSetAddress(tdChanA, LO16((uint32)ADC_SAR_1_SAR_WRK0_PTR), LO16((uint32)Filter_1_STAGEAH_PTR));

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dhgac_296796
Level 4
Level 4
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Thanks Pavloven !! I have corrected it and its fixed. But it working for 128 filter taps. If I reduce the number of taps, significant amount of 50Hz appears at the output. I have to add one more stage and the total combined size of all filters can be up to 128 taps.. What can be the solution??

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EvPa_264126
Level 7
Level 7
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Apparently you have to use OPAMP (TIA, PGA) and external components
for constructing the prefilter.
eg danaaknight gave a link to TI Filter Designer.

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dhgac_296796
Level 4
Level 4
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Thanks for the suggestion!!  I was trying to avoid off chip components. Anyway it would be essential some times. Thanks for your time and attention !

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

dhans,

   

Another approach can be to utilize 50 Hz notch  filter in code:

   

https://www.fpgarelated.com/showarticle/935/harmonic-notch-filter

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Thanks for your suggestion !! I shall go through this one. 

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