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PSoC™ 5, 3 & 1

EdPo_1556871
Level 1
Level 1

I am trying to make a 4 channel battery analyzer. In the design I am using an 8 channel AMux ahead of the DelSig ADC to allow the selection of 4 battery voltages on GPio

pins as well as the DAC (4) voltages that are buffered by 4 internal opamp followers. In operation the AMux goes through the 8 channels sequentially and all is well until it gets to channel 7 (last) which it always reads low. The channels are read 800 times a second at which time an average over the second is computed. Attached is the project.

Also, the ADC does not seem to do well under 80 mV even when in single ended mode which gos through zero.

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odissey1
Level 9
First comment on KBA 1000 replies posted 750 replies posted
Level 9

edpotzler,

The control opamps (Opamp_1 - Opamp_4) are not rail-to-rail output. The min output voltage is ~100mV. Try to remove opamps and control LM324 current driver directly by VDAC.

/odissey1   

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1 Reply
odissey1
Level 9
First comment on KBA 1000 replies posted 750 replies posted
Level 9

edpotzler,

The control opamps (Opamp_1 - Opamp_4) are not rail-to-rail output. The min output voltage is ~100mV. Try to remove opamps and control LM324 current driver directly by VDAC.

/odissey1   

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