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user_3568726
Level 2
Level 2
First like given

I created a new project, when I compiled, there is some errors, shows that unble to pack the design into 2 UDBs,but My schmetic is very simple. resource meter shows that UDB  still has free space, just like picture below, how to solve this problem? thanks very much.PSCO.jpg

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1 Solution
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

An UDB consists of several different parts, LUTs registers, datapath, macrocells, ALU etc. Some of the resources seem to have been spent while others are still avail. >Click on the "+" sign in front of the UDB in the resource list to get more information.

A brief estimation: I agree with the fitter, tihis design might need more than 2 UDBs. Try a larger chip as the CY8C4245.

Bob

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4 Replies
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

An UDB consists of several different parts, LUTs registers, datapath, macrocells, ALU etc. Some of the resources seem to have been spent while others are still avail. >Click on the "+" sign in front of the UDB in the resource list to get more information.

A brief estimation: I agree with the fitter, tihis design might need more than 2 UDBs. Try a larger chip as the CY8C4245.

Bob

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hi Bob,

     thanks for your answer, but i still do not understant, there are four UDBs in the chip, if it can not pack the design into 2UDBs, why do not use more UDBs? for example. if it uses 4 UDBs, there may be no problem.

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The CY8C4244-AXI-443 has got two UDBs only. Check in Creator device selector.

Bob

thanks Bob, I selected wrong device.... 

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