mr

[leonid]

Hi, in our application we use Cypress(Infinity) CY8C4128LQI-BL543 chip.

Development done with Cypress PSoC Creator 4.2 IDE.

Application should establish BT connection and send or receive some data.

All the time CPU and BLE  in possible Sleep mode.

Accordance to data logs from our customers we know that sometimes program took Watch Dog reset.

Watch Dog timeout is about 20 sec.

We catch watchdog reset as following: LR   : 0x00007027     PC   : 0x00002536 (LR - Link Register,

PC – Program Counter Register).

During analyzing  of disassembly file  we find out that reset took place in the CyExitCriticalSection() that was called by ll_wait_to_exit_dsm.

ll_wait_to_exit_dsm called by:           ll_exit_low_power_mode.

ll_exit_low_power_mode called by : CyBleController_ExitLowPowerMode or ll_task_handler.

CyBleController_ExitLowPowerMode called by:

CyBle_StackInit /CyBle_Shutdown/ CyBle_SoftReset/ CyBle_ExitLPM

It looks like Ble Stack can’t wake up BLE when application wants to send data.

Q: what can we do in application code to avoid such   deadlock?

[Yugandhar · Accepted solution]

Hello, 

Please refer the below points.
1. Don't write big code inside any ISR. Instead, set a variable inside ISR and check the variable status and call the function in main loop.
2. Always kept Bless interrupt to highest priority i.e., bless interrupt priority to 0.
3. Make sure that CyBle_ProcessEvents is called at regular intervals in the firmware. If any custom function consumes more time for execution, call CyBle_ProcessEvents inside it.

4. Use the upgraded components in the project (Goto Project -> Update_components ).

Please let me know if this helps. If not, please attach your project for testing at our end. 

Thanks,
P Yugandhar.