PSoC™ 4 Forum Discussions
I'm using a fast loop to just read the outputs of the SARADC into some TCPWMs. It mostly works, but there are glitches. The glitches are all "full on" periods. The glitches are not in any way synchronized with incoming data: they are still there with dc in. The ADC is set to 10 bits (single ended, no averaging), and in fact I masked out any potential high bits that might be set (I'm also shifting the data right) just in case that was the problem (the docs for the ADC use dashes not zeroes for the Right/Unsigned format, and just in case they don't really mean that null is 0, I tried this). I also put in a test: if the ADC was not ready I forced the reading to zero. Neither step helped, so I'm suspecting that the fast, repetative, writes to the PWMs are the problem and that sometimes the Compare register is being written while it is also being used?
I'm having trouble understanding the meaning of section 17.3.4.2 of the 4100/4200 TRM: does this mean that just writing to the Buffer Compare register needs to be synchronized with TC in software? (For my application the period register is fixed at 1023, so I'd not have to update that.)
The only ISR I'm using is one from the SCB in SPIS mode: that is working fine. I'm using it to receive global variables which control the shifting (right) of the data received from the ADC into the PWMs. Again, that works.
I interpreted the double headed arrow in 17.3.4.1 (etc.) to imply a "ping-pong" type of configuration where the software writes to the "Buffer compare" register while the "Compare" register is "live". Is this wrong? And what is a "switch event"? If that originates with the switch input then I don't have any..but the PWM is being updated, and most of the time with the right data, so what is the actual architecture?
I'm using a CY8CKIT-049-42.
{First posting, man this Forum software is bad..I know you all know this from other comments !}
Show LessHello,
I have seen the following video describing a very useful method of using the switch in the 049-kit to enter into programming mode the 049-KIT but didn’t found the example project to download, and currently there are several people in my circle of friends that will start using 049-KIT for DIY projects I decided to implement the method and give them the project so they can start from there. I share here the project.
I have made the implementation in PSoC Creator 3.2 .
Best regards,
João Nuno Carvalho
Show Less
How would you go about expanding the number of capsense pins on the Ez Ble module. Is a solution to communicate with a capsense IC from the CY8C20XX6A family using I2C?
Show LessHello All
I am Trying to Broadcast a single(only one) Packet using Psoc 4 Module in CY8CKIT-042 BLE Kit.
set time out 1Sec (which is min).
advertinging interval = 1000ms(min) and 1000ms(max).
after wake up using switch it should broadcast a sinlge packet with data as 5 in it. and goes to DeepSleep Mode.
but broadcast 2 packets after wakeup.
even if i set time out 1 Sec and advertising interval = 500ms(min) and 500ms(max).(Expected packets 2)
then it broadcast 3 Packtets with data as 5 in it.
evertime it is broadcasting one more packet than expected.
My aim is to broadcast only a single packet.
i have attached my project for reference.
Thanks and Regards
Amol
Show LessHello,
Because I am developing CYBLE-022001-00 for product now and
I find out that there are many template project in PSoC 4 BLE.
Use tempalte project can develop very fast because I just need to choice what template I need and use it.
Then I just need to write some code and I can complish my project.
But in another view, make template is look like very hard for new devleoper of PSoC Creator.
It's very hard to make owned template for me
Does anyone have the experience to make your own tempalte project before ?
Which is the efficient way to make your owned template ?
Now,
I think I need read spec for each world and then I can refer PSoC 4 BLE template.
Try to make the same thing in CYBLE-022001-00.
I don't know whether it a good way.
Can any cypress expert suggest me how to make my owned template project ?
I want to make the template projects about
I2C Bus (control in local, not controlled by BLE ), SPI Bus(control in local , not controlled by BLE ) and PWM
for CYBLE-022001-00
Can anyone suggest me how to make it ?
Thanks a lot
Hello!
I need to install three input switches corresponding to which there are three LEDs that show the status of the switches.
I was certain to use macanical switches. But just got to know a bit more about the CAP SENSE capability of PSoc chips.
So m thinking to give a try to the CAPSENSE version.
Simplified scenario...
There's a PCB containing three LEDs
Above the LED is 1mm thick diffusing epoxy
Above the epoxy is 1mm transparent glass. The user will touch this glass.
I want to make the capsense pads just below the LED. Size of pad is approx 4mmx2mm
A 3D photo is attached for better understanding.
Am I thinking in the correct direction or am I incorrect in the approch?
I have zero experience with cap sense.
Please help/guide...
Thanks!
Show LessHello!
Is it ok to route the output of the op-amp (in follower configuration) to the SARMUX internally?
Since the routing is internal, a resistive load cannot be connected to the opamp output. Without resistive loading, is there a possibility of unstability and also inaccuracy dueto overshoots and oscilations?
Thanks...
Show LessI am using a 4200, and have a switch on P3.5, with a falling edge interrupt. That works just great when the chip is awake. But when I put it into deep sleep, the interrupt never happens and the chip never wakes up. I'm stopping the ILO before deep sleep, and restarting the ILO on wakeup (which never happens). The IRQ should restart the IMO, and state should be retained. I have saved the state of PWMs and other UDBs, but even without any other configuration besides the single GPIO pin with the switch, it doesn't work.
Since it's deep sleep and all the clock are off, I am using transparent mode on an input pin configured as resistive pull-up, and with the input buffer enabled. I have also tried single-sync with input buffering.
Here's some code (I didn't include the obvious code to register the ISR, etc.) the ISR works fine when not in deep sleep.
CySysClkIloStop(); // turn off the ILO
CySysPmDeepSleep(); // go to DEEP sleep
CySysClkIloStart(); // turn the ILO on again (after the GPIO IRQ returns we should be here)
CY_ISR(ISR_SW_PWR_Handler)
{
SW_PWR_ClearInterrupt();
return;
}