I got my CY8C4246AZI-M443ES (does ES mean Engineering Sample?) chip and board today and built it up. Usual thing to do is a simple hello world...
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I got my CY8C4246AZI-M443ES (does ES mean Engineering Sample?) chip and board today and built it up.
Usual thing to do is a simple hello world with a blinking LED. In other systems I would do that with a loop, but on PSOC I usually just divide down a clock to 2hz and route it out to the HB_LED pin. Of course of PSOC4 that isn't as easy as it is with PSOC5LP, but I took the extra step of setting up the output pin for clocking output and then it works. I've done this on 4200 (non M) chips before.
Amazed to find that the M series has changed the clocking system again. No more 24 bits clocks, back to 16 bits. But according to the TRM we have more of them. Tried tossing in a freq divider from component library but that blew the UDB limit.
So I used a TCPWM (there are plenty). I made a 1Khz clock and then used the PWM to blink the clock. I left the output pin in clock mode, but I can probably switch back to a regular pin since the LINE output has probably left the clock domain.
Anyway, it works. Attached is a project to look at. All done in Creator 3.3
Now for the questions: (all done with Creat
In the results report and on the new Resource Meter (LOVE THAT FEATURE) it shows 0 of 4 digital clocks used. where did my 1Khz clock go? Aren't there supposed to be 16? Or am I ready the TRM wrong and there are 16 but 12 are internal/system vs. user.
Any other way to get a 2Hz signal? I can't find anyway to get the ILO except in the similar manner above where I have to use a TCPWM to divide it down.
The Clock Component talks about Routed1, Routed2, Routed3, Routed4 as 'existing clock source'. But I don't find anything in the TRM (that I can see). Any way that I can't find to cascade one clock into another.
My CY8CKIT-043 units finally shipped on Thursday and should arrive Monday or Tuesday.
-Ed
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