PSoC™ 4 Forum Discussions

Hello everyone,

Does this chip "CYBLE-022001-00" suitable for sending data (ADC) via Bluetooth continuously? What are the max bits it can send?

Thank you in advance,

Fahed

Hi all.

I've been working on a project based on CYBLE-022001-00 in which I needed two serial interfaces (1 I2C on SCB0 and 1 SPI on SCB1).

Now I need to add a UART channel and I was thinking to share SCB1. The configuration is the following:

MISO P4[1]

MOSI P4[0]

SCLK P5[1]

TX P3[5]

RX P3[4]

The SPI CS is manually managed.

I've tried to follow the following examples without any luck:

- SCB_UnconfiguredComm Example Project 1.0

- Time-Sharing a PSoC® 4 Serial Communication Block (SCB) Between Two Functions – KBA90605

Can anyone point me in the right direction?

Thanks in advance

Hi

I would like to connect a PSoC BLE to a PSoC 5LP and use the PSoC BLE as a transceiver for the circuit. What would be the best way to connect the two PSoC's and communication protocol to use? UART & AT? SPI?

Thank you in advance

Regards

Paddy

Hi Everyone,

we are having an issue in developing an Android app.  The app is visible and the pcb connects fine with an older Android version - but not with the latest Android.  Has anyone experienced this issue?  Phone won't even show the item although the phone's bluetooth antenna will.

Problem seems to lie within the App.  Any ideas?

thank you and I appreciate your time.

best,

Francisco.

Hello.

Q1-A)

Below is description of P116 in AN64846.

-> http://www.cypress.com/file/41076/download

=========================================

Air gap to ground and other sensors should be equal to the overlay thickness, but no smaller than 0.5 mm, and no larger than 2 mm.

The spacing between the two adjacent buttons should be large enough that if one button is touched, a finger should not reach the air gap of the other button.

=========================================

Which part of layout does the above explain?

Which ‘A’ or ‘B’ of attached file does the above explain?

I think that above explains ‘A’ of attached file.

Because I think that “Air gap to ground” of document is pointing to ‘A’.

But I do not know what “other sensors” explains.

Does “other sensors” explain the spec of gap between sensors?(like ‘B’ attached file)

If yes, I can not understand the meaning of “no smaller than 0.5 mm, and no larger than 2 mm”.

I think that any issue will occur if the gap between sensors is too close.

In this time, I think that the possibility of false touch will increase.

But I think any issue will not occur if the gap between sensor is too far.

So I could not understand a sentence of “no larger than 2 mm” if “other sensors” of above explanation points a gap between sensors.

And layout checklist explains “Air gap between button and hatch”, but checklist does not explain “other sensors”.

Please advise about above explanation.

Q1-B)

What kind of a problem occur if above spec of user’s layout is smaller than 0.5mm?

Will parasitic capacitance increase because GND approaches the sensor?

Then will sensitivity decrease?

Q1-C)

What kind of a problem occur if above spec of user’s layout is larger than 2mm?

Will noise immunity weaken because GND leaves the sensor?

Q2-A)

Below is description of P117 in AN64846.

=========================================

Keep the width less than or equal to 7 mil (0.18 mm)

=========================================

Does above description explain trace width of ‘C’ in attached file?

Q2-B)

What kind of a problem occur if above spec of user’s layout is bigger than 7mil(0.18mm)?

Will parasitic capacitance increase?

Then will sensitivity decrease?

Best Regards.

Yutaka Matsubara

I need to reconfigure the PSOC4-BLE (CYBLE-214009 module) SCB UART RX pin on P14 from the UART to a generic GPIO.

I have followed several threads but they're all reconfiguring the GPIOs in slightly different ways and I can't see how to do what I want.

I have figured out I need to write some of the HSIOM registers and their definitions are in cyfitter.h.

/* UART_rx */
#define UART_rx__0__DR CYREG_GPIO_PRT1_DR
#define UART_rx__0__DR_CLR CYREG_GPIO_PRT1_DR_CLR
#define UART_rx__0__DR_INV CYREG_GPIO_PRT1_DR_INV
#define UART_rx__0__DR_SET CYREG_GPIO_PRT1_DR_SET
#define UART_rx__0__HSIOM CYREG_HSIOM_PORT_SEL1
#define UART_rx__0__HSIOM_GPIO 0u
#define UART_rx__0__HSIOM_I2C 14u
#define UART_rx__0__HSIOM_I2C_SDA 14u
#define UART_rx__0__HSIOM_MASK 0x000F0000u
#define UART_rx__0__HSIOM_SHIFT 16u
#define UART_rx__0__HSIOM_SPI 15u
#define UART_rx__0__HSIOM_SPI_MOSI 15u
#define UART_rx__0__HSIOM_UART 9u
#define UART_rx__0__HSIOM_UART_RX 9u

...

#define UART_rx__PC CYREG_GPIO_PRT1_PC
#define UART_rx__PC2 CYREG_GPIO_PRT1_PC2
#define UART_rx__PORT 1u
#define UART_rx__PS CYREG_GPIO_PRT1_PS
#define UART_rx__SHIFT 4u

But which register do I need to write and what value do I need to set the GPIO back to using the DR regs for the output level?