PSoC™ 4 Forum Discussions
Do you have any criteria of visual inspection when module mounted to customer's board?
For example, compliant CP** etc.
MPN:CYBLE-022001-00
Regards,
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I need to Know , can i detect a piece of metal (which is floating type, that means it is not grounded) can be detected with cap sense?. If can please suggest me the changes in Capsense module parameters in Psoc 4.
Show LessHello.
Q1-A)
Below is description of P116 in AN64846.
-> http://www.cypress.com/file/41076/download
=========================================
Air gap to ground and other sensors should be equal to the overlay thickness, but no smaller than 0.5 mm, and no larger than 2 mm.
The spacing between the two adjacent buttons should be large enough that if one button is touched, a finger should not reach the air gap of the other button.
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Which part of layout does the above explain?
Which ‘A’ or ‘B’ of attached file does the above explain?
I think that above explains ‘A’ of attached file.
Because I think that “Air gap to ground” of document is pointing to ‘A’.
But I do not know what “other sensors” explains.
Does “other sensors” explain the spec of gap between sensors?(like ‘B’ attached file)
If yes, I can not understand the meaning of “no smaller than 0.5 mm, and no larger than 2 mm”.
I think that any issue will occur if the gap between sensors is too close.
In this time, I think that the possibility of false touch will increase.
But I think any issue will not occur if the gap between sensor is too far.
So I could not understand a sentence of “no larger than 2 mm” if “other sensors” of above explanation points a gap between sensors.
And layout checklist explains “Air gap between button and hatch”, but checklist does not explain “other sensors”.
Please advise about above explanation.
Q1-B)
What kind of a problem occur if above spec of user’s layout is smaller than 0.5mm?
Will parasitic capacitance increase because GND approaches the sensor?
Then will sensitivity decrease?
Q1-C)
What kind of a problem occur if above spec of user’s layout is larger than 2mm?
Will noise immunity weaken because GND leaves the sensor?
Q2-A)
Below is description of P117 in AN64846.
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Keep the width less than or equal to 7 mil (0.18 mm)
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Does above description explain trace width of ‘C’ in attached file?
Q2-B)
What kind of a problem occur if above spec of user’s layout is bigger than 7mil(0.18mm)?
Will parasitic capacitance increase?
Then will sensitivity decrease?
Best Regards.
Yutaka Matsubara
Show LessI need to reconfigure the PSOC4-BLE (CYBLE-214009 module) SCB UART RX pin on P14 from the UART to a generic GPIO.
I have followed several threads but they're all reconfiguring the GPIOs in slightly different ways and I can't see how to do what I want.
I have figured out I need to write some of the HSIOM registers and their definitions are in cyfitter.h.
/* UART_rx */
#define UART_rx__0__DR CYREG_GPIO_PRT1_DR
#define UART_rx__0__DR_CLR CYREG_GPIO_PRT1_DR_CLR
#define UART_rx__0__DR_INV CYREG_GPIO_PRT1_DR_INV
#define UART_rx__0__DR_SET CYREG_GPIO_PRT1_DR_SET
#define UART_rx__0__HSIOM CYREG_HSIOM_PORT_SEL1
#define UART_rx__0__HSIOM_GPIO 0u
#define UART_rx__0__HSIOM_I2C 14u
#define UART_rx__0__HSIOM_I2C_SDA 14u
#define UART_rx__0__HSIOM_MASK 0x000F0000u
#define UART_rx__0__HSIOM_SHIFT 16u
#define UART_rx__0__HSIOM_SPI 15u
#define UART_rx__0__HSIOM_SPI_MOSI 15u
#define UART_rx__0__HSIOM_UART 9u
#define UART_rx__0__HSIOM_UART_RX 9u
...
#define UART_rx__PC CYREG_GPIO_PRT1_PC
#define UART_rx__PC2 CYREG_GPIO_PRT1_PC2
#define UART_rx__PORT 1u
#define UART_rx__PS CYREG_GPIO_PRT1_PS
#define UART_rx__SHIFT 4u
But which register do I need to write and what value do I need to set the GPIO back to using the DR regs for the output level?
Show LessI want to increase MCU deep sleep interval. MCU wakeup will be done by watch dog timer.But with watch dog timer0 & timer1 i can achieve up to 2 secs.But requirement is more than 2 sec So i found a way is cascading two timers.One will act as period counter & another will act as prescaler .But i dont know how implement this using Watchdog API.
Another way is to decrease clock but same for clock how to reduce it for WDT?
Is there any other possible way ?
Show LessDear all PSoC fans,
I am having a problem when connecting to a PSoC 4® chip that I am using in a project. Apparently the MiniProg 3® connects to the PSoC and reads something as shown on the picture attached. I have 5 boards using a PSoC4 (CY8C4245AXI-473) but only one of them had connected properly to the Miniprog and the PSoC Creator. All of the others ar showing the same issue where the Cypress ID is 0x00001193 but one that shows 0xBEEF1193. Sometimes the PSoC Creator detects a valid PSoC4 chip, but when I try to program it just say that the connection failed or was unable to erase the flash.
Have you guys know what is happening? Did I fry the PSoCs?
Nicolas
Show LessHi,
I have CY8CKIT-042-BLE and running PSoc Creator 4.1 release date of 6/12/2017
I wanted to know how to setup pairing one time and after that it does not need to go thru pairing.
I searched the website of examples for
CyBle_GapAddDeviceToWhiteList and
CyBle_GapRemoveDeviceFromWhiteList but the examples are not very clear.
I also looked at the GAP Settings->Peripheral role->Advertisement packet in the PSoC Creator 4.1 GUI under the TopDesign.cysch and see that "Discovery mode: Genera;"
"Adversiting type: Connectable undirected advertising"
"Filter policy: Scan request: Any|Connect request: White List"
"Advertising channel map: All channels"
And under GAP Settings->Security is shown below:
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I've been going over this project and am having a tough time figuring out the order when it comes to Authenticating/Bonding/Pairing versus connecting to a bonded peer. It jumps back and forth through main.c, so I can't really get a clear understanding of the StackEvent order.
I'm coding both central and peripheral roles on 2 separate devices. I understand that when 2 unbonded devices go through the authentication procedure, the CYBLE_EVT_GAP_AUTH_COMPLETE event is returned, but what is returned when the devices are bonded and a connection is made?
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