PSoC™ 4 Forum Discussions
Hello. It is not obviouse the description and behavior of the left align ff pwm.
First question is swap. Is it just shadow register or it is individual register ?
In case of COMPARE_BUF is shadow register my expecting is :
1. write in COMPARE_BUF will replace the value in COMPARE_BUF. Value in COMPARE will remain the same.
2. every SWAP on TC will copy value from COMPARE_BUF into COMPARE. At this moment we will have the same value in COMPARE and COMPARE_BUF
So DMA can write data into COMPARE_BUF and TC event will copy value from COMPARE_BUF into COMPARE and pwm will use COMPARE (every time copied from COMARE_BUF)
In case of COMPARE_BUF is individual register my expecting is :
1. write in COMPARE_BUF replace the value in COMPARE_BUF. Value in COMPARE will remain the same.
2. on every SWAP the COMPARE and COMPARE_BUF will be "switched" so "current active logical compare register" will be switched from COMPARE to COMPARE_BUF and vice versa next time. The values in COMPARE and COMPARE_BUF will be different. The next SWAP will switch pointer from current COMPARE_BUF to COMPARE without coping one to another.
So DMA should write one time into COMPARE, next time into COMPARE_BUF, next again in COMPARE and so on.
What is right ?
Second question is updating in runtime of COMPARE without of using SWAP.
TCPWM datasheet says about double buffering. What does it mean ? Just COMARE and COMPARE_BUF or we have shadow registers ? Where can I read about it ? How does it work ? I've been looking for this in TCPWM datasheet, in PSoC 4 architecture reference manual and in PScC 4 registers reference manual. Have no answers.
Compare event trigger DMA to send data into COMPARE register. Does COMPARE register realy take new value from DMA or data from DMA take place in an shadow register (double buffer) ?
According to documentation COMPARE and PERIOD registers will be updated only on TC event. Ok. I will write PERIOD and COMPARE but they will be updated during next TC. Where in this case the new values of PERIOD and COMPARE are preserved ? As I understand the old values remain the same until TC event. But why I cannot write new value in PERIOD if it less then old value ? Until TC the PERIOD will not be changed but I cannot write it becase ... I do not have detailed information what going on in COMPARE and PERIOD after changing it's data on the run.
I need to change COMPARE and PERIOD on the fly but have no detailed information about algorithm of it. Timers of STM32 much more complex but very predictable in every details. The main problem is documentation. Is not detailed.
Show LessAre there any limitations that would prevent this module from fulfilling any role of a bt mesh network? Node, Relay, Proxy, Friend Low Power? Can it interoperate with the same and different BLE modules in a bluetooth network?
Show LessHello,
I have a question about SPI component.
Device: CYBLE-212020-01
1) Is it possible to assign both Slave and Master to the SPI (SCB mode) component?
2) Is it possible to share the four pins (miso, mosi, sclk, ss) using in both Slave mode and Master mode?
3) If 1) and 2) are impossible, any other way?
Best Regards
Show LessIs there a possibility to use the BLE module as a simple UART connection (like those chinese hc-06 breakouts)?
I tried a few things but without any sucess.
Show LessHi.
i am working on PWM to generate the continous signal but after few seconds PWM stops working.
If i made a CyBle_ProcessEvents(); as commented than PWM working fine but i want to use the CyBle_ProcessEvents(); and PWM also.
please help me to resolve the issue thanks in advance.
i attached my project please find thw attachment.
Show LessThe default community standard for UART over BLE appears to be UUID = 6E400002-B5A3-F393-E0A9-E50E24DCCA9E
Does anyone have an implementation on Cypress BLE?
Thanks
Show LessHi,
I was using the component SCB_P4 3.20 as an I2C component. I updated the component to 4.0, added the timeout value to the functions, as described in the datasheet, but my code doesn't work anymore. I've compared the generated files before and after the change, but there is too much for me to pinpoint the issue. Here is my code :
#define I2C_TIMEOUT_MS (100)
int I2C_read(unsigned char *buf, int bufferSize) {
// Read must be passed the following format with expected start, restart,
// stop to be inserted
// buf[0]: ADDRESS + W
// buf[1]: REG ADDRESS
// buf[2]: ADDRESS + R
int cnt,
status = bufferSize;
uint32_t devAddr,
rdVal,
err;
// Extracting
devAddr = (uint32_t)((buf[0] >> 1) & 0x7F);
// Sending Start and address + w followed by the register address
if ( I2C_I2CMasterSendStart(devAddr, 0, I2C_TIMEOUT_MS) != I2C_I2C_MSTR_NO_ERROR ) { return -1; }
if ( I2C_I2CMasterWriteByte(buf[1], I2C_TIMEOUT_MS) != I2C_I2C_MSTR_NO_ERROR ) { return -1; }
// Sending Restart and reading data
I2C_I2CMasterReadBuf(devAddr, buf, bufferSize, I2C_I2C_MODE_COMPLETE_XFER | I2C_I2C_MODE_REPEAT_START);
while( !((err = I2C_I2CMasterStatus()) & (I2C_I2C_MSTAT_RD_CMPLT | I2C_I2C_MSTAT_ERR_XFER)) ) {
CySysPmSleep();
}
I2C_I2CMasterClearReadBuf();
return status;
}
int I2C_write(unsigned char *buf, int bufferSize) {
// Write must be passed the following format with expected start and
// stop to be inserted
// buf[0]: ADDRESS + W
// buf[1]: REG ADDRESS
// buf[2 to 2+bufferSize]: value
int cnt;
uint32_t devAddr, err;
// Extracting
devAddr = (uint32_t)((buf[0] >> 1) & 0x7F);
// Sending Start and address + w followed by the register address and then values
if ( I2C_I2CMasterSendStart(devAddr, 0, I2C_TIMEOUT_MS) != I2C_I2C_MSTR_NO_ERROR ) { return -1; }
for ( cnt = 1; cnt < bufferSize + 2; cnt++ ) {
if ( I2C_I2CMasterWriteByte(buf[cnt], I2C_TIMEOUT_MS) != I2C_I2C_MSTR_NO_ERROR ) { return -1; }
}
// Stop
if ( I2C_I2CMasterSendStop(I2C_TIMEOUT_MS) != I2C_I2C_MSTR_NO_ERROR ) { return -1; }
return bufferSize;
}
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