PSoC™ 4 Forum Discussions

The device is a PSOC 4200. I'm using the 8-bit IDAC for CAPsense and the 7-bit iDAC in standard configuration.

According to the resource meter, the uC has both these iDACs.

When I compile the project with just the 8-bit iDAC it works without a problem. However, when I add the 7-bit iDAC to the design, it fails to compile. The error shown is  'unable to find a solution for the analog routing' That's it. There is no further description.

What could be the problem?

Hello community, my question is if it possible to use a PSoC 4200 BLE device in order to do Over the air Firmware update (FOTA) on another one PSoC 4200 BLE device.

In other words I want to use one PSoC 4200 as Host for the other PSoC 4200 BLE.

Best Regards,

Bill

When my central receives a scan from the client, it has the client's address in a CYBLE_GAPC_ADV_REPORT_T data structure.  My central can connect to the client using this address.  But in my client code, I get (I assume) my client's address by calling CyBle_GetDeviceAddress.  THese two addressed don't match, why?

Hello, I'm using the PSOC4 4200 to sequence the power rails for an FPGA. I would like to run the PSOC in Unregulated External Supply to I can only provide 5V to the device. The 5V is applied as soon as power is applied to the board.

Is this the correct configuration for the 28-SSOP CY8C4244PVI-442?

Thank you very much,

Joe

Hello, I'm using the PSOC4 4200 microcontroller to do the power up sequence for an FPGA board. I've chosen the PSOC4 because I can get a really low pin count device. I have a question about the RESET line from the Programming Header. I've decided to use a 10 pin header (2x5) to interface with the PSOC.

Is the RESET from the header the same RESET from my push button reset?

In the graphic above this is how I think it should be wired up. The board reset line is connected to the PSOC and connected to pin 10 on the header.

Is this correct?

Thanks,

Joe

am trying to implement the voltage controlled oscillator example:-

http://www.cypress.com/%3FdocID%3D33522&ved=2ahUKEwiV7Oz6sqrkAhUGUR…

The problem:-

Psoc 4 is not straight forward configing the gpio pins following the above example.

Could someone please help with this ?

I found the following and I'm finding it difficult to follow:

http://www.cypress.com/comment/362321

How do I configure the following to implement the above example?

IDAC_1_Start();

for(;;)

{

/* Place your application code here. */

/* Connecting pin 1 to Amux bus where the 8 bit IDAC_1 is connected */

Pin_1_SetDriveMode(Pin_1_DM_ALG_HIZ);

CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) & ~(Pin_1__0__HSIOM_MASK)));

CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) | (0x06 << Pin_1__0__HSIOM_SHIFT)));

/* Delay for 1 second */

CyDelay(1000);

/* Removing Pin_1&apos;s connection from Amux bus and settin it to strong drive mode*/

Pin_1_SetDriveMode(Pin_1_DM_STRONG);

CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) & ~(Pin_1__0__HSIOM_MASK)));

/* Setting Pin_1 component to be operated by

Thanks

Good morning everyone and thanks for reading this post

I'm trying to communicate a PSoC 4 (CY8CKIT-049-42XX, with the chip CY8C4245AXI-483) with an ADC (ADS7280) through SPI. I'll later use a CYBL10162-56LQXI chip.

I want to perform two types of writes to the ADS7280: a 4-bit write, and a 16-bit one. This has led me to use the 4-bit data size when configuring the SCB SPI component. I want the 16-bit write to be continuous, that is, without any changes in the Slave Select pin. This is the reason why I've used the "Transfer separation: continuous" mode, because according to the datasheet, this is exactly what it does.

When using the code that I've included in this post, I've had no luck making it work. Troubleshooting it, I've found that the Slave Select pin DOES change states when it should be down all time, and I've narrowed it down to a problem of high-frequency data transfers, since it only happens at 4mbps and not at 2mbps or the other lower frequencies that I've tried, as you can see in the pictures:

      Slave Select pin while sending four 4-bit packets at 2mbps data rate, transfer continuous mode

      Slave Select pin while sending four 4-bit packets at 4mbps data rate, transfer continuous mode

I'm guessing the MCU can't put data into the TX FIFO fast enough, and the SPI component guesses that the transfer is over when in reality it shouldn't be.

Any other ideas why this happens? Any idea how to fix it? I'd rather not use DMA since the final chip I'll use doesn't have DMA.

Thank you a lot in advance.