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PSoC™ 4 Forum Discussions

bugkiller
Level 2
Level 2
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bugkiller_0-1672807213204.png

My project using 2 different MCU. First one is cypress(cy8c4248LQI-BL553) and second one is nuvoton(M0516LBN). Both is ARM cortex M0 based micro controller. 

Why I'm using two different MCU? it's because I need capsense function for touch button. When capsense occured, cypress send capsense data to nuvoton chip, and nuvoton process appropriate function. In normal circumstance, it work fine. But sometimes(few hours or few days), touch is dead and remote controller is also dead, I can't do anything(Hard fault situation). Only solution is rebooting my device.

So I presume using 2 different MCU can cause the prtoblem? I keep diging a solution for months...

Thanks,

Best regards, BK

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ncbs
Moderator
Moderator
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50 likes received 250 sign-ins 250 replies posted

Hi @bugkiller ,

At the first sight, UART communication between two different chips should not cause any problems. CapSense operation is independent of other peripherals. 

Is this a custom board? Have you routed UART [or high switching signals] very close to CapSense traces? UART lines may affect the performance of CapSense if routed very close to them. I would suggest you go through our design guidelines to verify if your custom board follows the same. You can find the quick summary/checklist in section 7.4.14 Layout rule checklist in PSoC™ 4 and PSoC™ 6 MCU CAPSENSE™ design guide

But I highly doubt UART causing CapSense to "halt" its operation. Do you have WDT implemented in your code? Is your code going into a hard-fault condition? When the uC enters an unknown condition where CapSense stops to operate, can you check if the CapSense block is giving its output or not? You may use Tuner to check if rawcounts are being output by the CapSense block.

Let me know the progress.

Regards,
Nikhil

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ncbs
Moderator
Moderator
Moderator
50 likes received 250 sign-ins 250 replies posted

Hi @bugkiller ,

At the first sight, UART communication between two different chips should not cause any problems. CapSense operation is independent of other peripherals. 

Is this a custom board? Have you routed UART [or high switching signals] very close to CapSense traces? UART lines may affect the performance of CapSense if routed very close to them. I would suggest you go through our design guidelines to verify if your custom board follows the same. You can find the quick summary/checklist in section 7.4.14 Layout rule checklist in PSoC™ 4 and PSoC™ 6 MCU CAPSENSE™ design guide

But I highly doubt UART causing CapSense to "halt" its operation. Do you have WDT implemented in your code? Is your code going into a hard-fault condition? When the uC enters an unknown condition where CapSense stops to operate, can you check if the CapSense block is giving its output or not? You may use Tuner to check if rawcounts are being output by the CapSense block.

Let me know the progress.

Regards,
Nikhil

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bugkiller
Level 2
Level 2
50 sign-ins First like received 10 questions asked

Yes, I'm using custom board, and I don't think UART is not that close to Capsense trace. I will try tuner method that you suggested. thanks!

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