SPI component problem in CYBLE-014008EVAL

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
NXTY_Tatebayasi
Level 6
Level 6
Distributor - NEXTY (Japan)
100 replies posted 100 likes received 50 likes received

Hi,community

I have a BLE,I2C,SPI project in progress using the CYBLE-014008 EVAL board.

So, I have the following problems with the placement of SPI components.

1.  Connecting the SPI clock to the digital out put pin causes an error.

    -Error:FFB and IO placement failed: Failed to find a valid placement for Pin_1(0)[= SPI CLK Pin].

    -Details:The FFB and IO placer did not find any valid placements for the design.

2. Attempting to place more than one slave (generally referred to as a chip select pin) will result in an error.

   This error not occured only mss1(0) but also mss2(0) and mss3(0)[there are means "CS2/CS3"].

     -Error: FFB and IO placement failed: Failed to find a valid placement for mss1(0).

    -Details:The FFB and IO placer did not find any valid placements for the design.

   Any solutions to these problems?

 

☆Information

Here is a sketch of what happens when the build does not go through.

Case1 CS0~1 with SPI CLK (Build Failed)

NXTY_Tatebayasi_2-1675223258784.png

 

Case2 CS0,1 and SPI CLK(Build Failed)

NXTY_Tatebayasi_1-1675223053692.png

Case3 CS0~3 without SPI CLK(Build Failed)

NXTY_Tatebayasi_3-1675223634480.png

 

 

Here is a sketch of what the build would look like if it went through.(Build Succeeded)

NXTY_Tatebayasi_0-1675222865647.png

 

Best Regards,

Chihiro Tatebayashi

 

0 Likes
1 Solution
Yugandhar
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 5 likes given

Hello @NXTY_Tatebayasi ,

Due to limited pin resources in the CYBLE-014008 module the above errors are occurred.
In PSoC Creator, Goto Design Wide Resources ->System ->Debug select and set to GPIO. If GPIO is selected the pins are available for general purpose use. When set to GPIO the device can still be acquired with SWD, and reprogrammed, but not for debugging. For more information see the device datasheet or Technical Reference Manual (TRM).
For more information, please refer to the section Digital and Analog Capabilities and Connections in the CYBLE-014008-00 EZ-BLE Creator Module datasheet for more information on available pins.

Thanks,

P Yugandhar. 

View solution in original post

0 Likes
3 Replies
Yugandhar
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 5 likes given

Hello @NXTY_Tatebayasi ,

Due to limited pin resources in the CYBLE-014008 module the above errors are occurred.
In PSoC Creator, Goto Design Wide Resources ->System ->Debug select and set to GPIO. If GPIO is selected the pins are available for general purpose use. When set to GPIO the device can still be acquired with SWD, and reprogrammed, but not for debugging. For more information see the device datasheet or Technical Reference Manual (TRM).
For more information, please refer to the section Digital and Analog Capabilities and Connections in the CYBLE-014008-00 EZ-BLE Creator Module datasheet for more information on available pins.

Thanks,

P Yugandhar. 

0 Likes
BiBi_1928986
Level 7
Level 7
First comment on blog 500 replies posted 250 replies posted

Hello.

Please read the datasheet, Table 4, for which port pins provide SCB signals for this module.
CYBLE-014008-00, EZ-BLE™ Creator Module (infineon.com)

The module SCB's do not support 4xSS signals to the port pins.  Module only support 3xSS signals.
SCB0 on module supports SS0, SS2, SS3
SCB1 on module supports SS1, SS2, SS3

To get a 4th SS signal, you can control an unused GPIO pin with software.

I would suggest to use SCB1 for SPI, and SCB0 for I2C.  Otherwise, you will lose SWD pins for debugging.  Yugandhar has a good suggestion if you need more GPIO's by changing SWD signals into GPIO signals.

NXTY_Tatebayasi
Level 6
Level 6
Distributor - NEXTY (Japan)
100 replies posted 100 likes received 50 likes received

Hi, @BiBi_1928986 

I appreciate your advice, it is very helpful.
Thank you for the detailed explanation.

 

Best Regards,

Chihiro Tatebayashi

0 Likes