Maybe you should mention that this component is about connecting SATA devices to the PSoC... (not everybody knows what SGPIO means)
Here is the standard -
Hli, seems like 2.5" drives in general was motive for standard, and
of course SATA drives took over the 2.5" market. SAS was also
a motive for strandard.
this SGPIO code can not support 24 clocks of one data cycle, How to modify this component, let it support 24 clk。
thank you very much
You can refer to the attached SGPIO component. This new version can support up 24 bits per frame.
To import the component to PSoC Creator, please refer to this video:
I can not create 2 instances with this component in a project, but I can create 2 instances with SGPIO_Target_PSoC4.zip.
my psoc device is CY8C4246AZI-M445
This component can support 12 clks or/and 24 clks. If you need to dynamically change the number of clks supported, use the SetSGPIOFrameSize() function.
In order to support 24 clks, the component requires 3 UDBs. That means you can only place one instance in the PSoC 4M part.
You could remove the Vendor Specific info to save a few resources, but it will still require 3 UDBs.
tx and rx FIFO buffer is not need 4x datas, or do not need tx FIFO，this can reduce one udb？
Useing SetSGPIOFrameSize to set the clk is not practical， because PSOC do not know in advance the data length.
So I think the Frame need to be set 24 clk, if the practical data is 12 clk, and the ReadRxData return 12 valid clk data, and 12 invalid data(0).
Removing the TX FIFO support will not decrease the number of UDBs. It only reduces the number of PLD logic, but we still need at least 3 datapath to support 24 clks, which consumes 3 UDBs.
You could use a timer or a counter externally to the component to count the number of clocks between two consecutive rising edge of SLOAD. Once you find out that, you can call SetSGPIOFrameSize() and enable the SGPIO component.
if we need 3-4 channel SGPIO， what should we do？ we check that 1 SGPIO need 4 UDB to support, is
Do you need all the 3-4 channels work at the same time? If not, there are ways we can do some muxing, so you can keep the number of UDBs low.
Please reach out your sales representative with more information about your project. We can help to pick a solution for your product.
as we checked it again， independent SGPIO need too much resouce，muxing SGPIO can need the request， can you help advice the speed between SGPIO？ if it‘s possible， please help provide the demo code. TKS;
The SGPIO runs at 100 KHz. But since it transmits the data over and over, you don't actually need to read all the time. That's why muxing might work here.
About resourcing, there are ways to use the SPI + Smart I/O to implement a SGPIO target. We have an example for PSoC 6:
This should also work with PSoC 4.
If you contact your sales representative about your project, such as application target, production date and volume, you might able to get some resources to get this implemented for you.
3 muxing SGPIO, 1ch UART,3-4ch I2C， we can choose PSCO4 or PSOC6 part, can you help to advice it？
Your application doesn't require too many I/Os, so a PSoC 6 might be too big.
Based on the information you provided, I think you can go with PSoC 4200L. It has 8 UDBs (for SGPIO + Muxing) and 3-4 SCBs (for UART and I2C).
If you want a demo, again, talk to your sales representative.
tks for advice, PSOC4200L is the best chooise, can you help to provide the code example base on CY8CKIT-046 ?tks;
Which company do you work for? What application is this for? How many units do you need? Is there an Infineon or distributor representative where you work? If yes, talk to them and provide all this info. They can help you to create a code example to kick off your project.