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Hello.
Below is description of CapSense component datasheet.
=====================================
A higher modulator clock-frequency reduces the sensor scan time.
This results in lower average power consumption and reduces the noise in the raw counts.
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How much will raw count noise increase when modulator clock frequency reduces?
I want to know increase rate of raw count when modulator clock frequency reduces.
For example, the scan time doubles when the frequency changes from 48MHz to 24MHz.
Will raw count noise also double in that case?
Best Regards.
Yutaka Matsubara
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PSoC 4 MCU
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Hi Yutaka-san,
That note is an error in the component datasheet. Please see this section in the CapSense design guide AN -
The noise would decrease if the modulator clock frequency is reduced in CSD. However, please note that this will not be a direct relationship, that is, setting the mod clock to half its value will not result in half the noise. You would only see a small reduction in the overall noise.
I will also have an internal ticket to get this corrected in the component datasheet. Thank you for pointing this out.
Best regards,
Hari
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Hi Yutaka-san,
That note is an error in the component datasheet. Please see this section in the CapSense design guide AN -
The noise would decrease if the modulator clock frequency is reduced in CSD. However, please note that this will not be a direct relationship, that is, setting the mod clock to half its value will not result in half the noise. You would only see a small reduction in the overall noise.
I will also have an internal ticket to get this corrected in the component datasheet. Thank you for pointing this out.
Best regards,
Hari
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Hari-san.
Thank you for your response.
I understand.
Best Regards.
Yutaka Matsubara