Random state when disabling clock output pin in PSoC 4

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OtGo_1311741
Level 3
Level 3
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Hi everybody,

I'm using a pin to output a clock signal of 1KHz named Clock1.  I have configured the pin as Clock-Inverter in the output mode and selected External in the Out Clock option.  The clock signal output is working fine. But when I disable the signal using the function Clock1_Stop(), the pin state, instead of being 0V, sometimes becomes 5V steady.  I need the pin to be zero volts steady when I disable this clock.

Anybody knows why this happens and how to fix it?  Thanks in advance.

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I think I got something working.  In fact the pin has a output clock enable which lets me control the output clock.  If it is logic 1, the clock signal will be at the output of the pin.  If it is logic 0, the pin becomes zero, so I don't have to turn off the clock.

Luckily, I could use an extra pin available as a control register to manipulate the output clock enable signal (the PSoC I'm working with does not have control registers):

pastedImage_0.png

I'll be testing but I think this may resolve the issue .

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