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DanMeeks
Level 1
Level 1
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I have used PSoC4 (4013 and 4014) for three projects recently and I have found several issues that have cost me a lot of time to work through. For example, and this is probably not everything, just off the top of my head:

if there is too much C on the VDD rail you cannot use power cycle to program. I built the little circuit that uses XRES through a buffer to drive VCC and that helps, but still too much C is still a problem.

If P1.6 is actively driven during first programming, it will not program.

Programmer will sometimes program the part while Creator will not.

 

My question today is - where are all of these issues documented? There are a lot of messages from users like me frustrated with these quirks. Surely they are all documented somewhere? I have searched for "errata" and I get nothing. How can that be?

Thanks -

Dan

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BiBi_1928986
Level 7
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First comment on blog 500 replies posted 250 replies posted

Hello.

I program PSoC 4013, 4014, using Power Cycle mode.  Yes, the 4000 family has special requirements when they don't have a dedicated XRES pin and this is all documented.  No errata necessary.

In the datasheet, directly under the Pinouts table, you'll find a P1.6 reference note stating not to have a load to ground during POR.

In app note AN86439, which I highly recommend for good reading of PSoC4 GPIO's, under Start-up And Low-Power Behavior, there's even more description about P1.6 during power-up.

In the Knowledge Base Article, KBA91258, more details about P1.6.
I/O System Restrictions in the PSoC® 4000 Family –... - Infineon Developer Community

As for driving a capacitive load, I have no problem driving 100uF with the buffer I put together using 74AC14 invertor buffers.
Solution: Use Kitprog to Program PSoC 4000 without... - Infineon Developer Community
If you have a large enough circuit that needs more capacitance, then diode isolate the PSoC Vddd rail from all other circuitry.  Then, your buffer should handle the smaller capacitive load.

As for differences in programming between Creator and PSoC Programmer, I've not experienced any difference when using Kitprog.  I don't have a Miniprog so I have no comment for it.

The most common reason for strange programming behavior is, the SWD signal cables are too long between programmer and target device.  5cm up to 10cm length is the limit.  Beyond that, signal integrity becomes an issue.

And the next most common error is, Vccd got connected to Vddd by mistake.  Once that error is discovered and the track is cut, the device will (maybe) program a few times and then won't program.  That's because the part is damaged from the original mistake and needs to be replaced.

The following document doesn't address any of your issues, but it's a good PSoC design checklist reference, AN88619:
PSoC 4 Hardware Design Considerations (cypress.com)

All the PSoC's have certain quirks.  Once you understand them (and read all the related documentation you can find), they are great devices to work with.

Good luck with your projects.

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BiBi_1928986
Level 7
Level 7
First comment on blog 500 replies posted 250 replies posted

Hello.

I program PSoC 4013, 4014, using Power Cycle mode.  Yes, the 4000 family has special requirements when they don't have a dedicated XRES pin and this is all documented.  No errata necessary.

In the datasheet, directly under the Pinouts table, you'll find a P1.6 reference note stating not to have a load to ground during POR.

In app note AN86439, which I highly recommend for good reading of PSoC4 GPIO's, under Start-up And Low-Power Behavior, there's even more description about P1.6 during power-up.

In the Knowledge Base Article, KBA91258, more details about P1.6.
I/O System Restrictions in the PSoC® 4000 Family –... - Infineon Developer Community

As for driving a capacitive load, I have no problem driving 100uF with the buffer I put together using 74AC14 invertor buffers.
Solution: Use Kitprog to Program PSoC 4000 without... - Infineon Developer Community
If you have a large enough circuit that needs more capacitance, then diode isolate the PSoC Vddd rail from all other circuitry.  Then, your buffer should handle the smaller capacitive load.

As for differences in programming between Creator and PSoC Programmer, I've not experienced any difference when using Kitprog.  I don't have a Miniprog so I have no comment for it.

The most common reason for strange programming behavior is, the SWD signal cables are too long between programmer and target device.  5cm up to 10cm length is the limit.  Beyond that, signal integrity becomes an issue.

And the next most common error is, Vccd got connected to Vddd by mistake.  Once that error is discovered and the track is cut, the device will (maybe) program a few times and then won't program.  That's because the part is damaged from the original mistake and needs to be replaced.

The following document doesn't address any of your issues, but it's a good PSoC design checklist reference, AN88619:
PSoC 4 Hardware Design Considerations (cypress.com)

All the PSoC's have certain quirks.  Once you understand them (and read all the related documentation you can find), they are great devices to work with.

Good luck with your projects.

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DanMeeks
Level 1
Level 1
10 sign-ins 5 replies posted 5 questions asked

BiBi - I really appreciate your comments but respectfully that is not good enough from Cypress.

I have used plenty of PSoCs before, and these particular ones (4013 / 4014) have a very unique set of "issues".

These should all be documented in a single errata. Shame on Cypress for not recognizing how many cumulative hours are spent by users that have to find these things out the hard way.

Especially since I / we have used other PSoCs in the past, the expectation is that they will be just as well behaved - but they aren't. If nothing else, this is a good reason to thoroughly document these issues. I makes me reconsider using PSoC again, that's how bad it is. It says a lot about the lack of respect for us users out here that this stuff is overlooked - and I have to think it is deliberate. The PSoC apps team knows about these things but doesn't seem to think it's important enough to fess up to it in order to help out us users. Especially since it is so different than other PSoCs.

Again - appreciate your answer - this is a problem with Cypress apps / marketing. I use PSoCs exactly because they are so much easier to set up than other micros. But if I am going to spend this much time figuring out these quirks, I might was well be using a different micro.

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Hi Dan.

I know where you're coming from..., I too spent hours trying to figure out how to program 4013 without XRES pin.

What's lacking from Cypress is a clear hardware design example using this chip along with a circuit showing how to program it.  Cypress has many KITs, but they all have XRES pin resource.  And I think their reply would be, purchase a Miniprog, it supports Power Cycle programming.  But, that won't address the hardware design aspects as you pointed out (like too much capacitance).  Then again, I suppose that's really a designer issue, not a PSoC short-coming. 

So, I decided to put together the article ("Solution..." web link earlier) on how to program this device with the hopes that other users would find it, build it, program with it.  And to a degree, it's been helpful.  But, I thoroughly agree, something official should be sourced from Cypress.

FYI, I saw a discontinued notice for 4013 (or was it 4014?).  Certainly, for 1 of those chips.  I don't recall which package.  So beware of "last time buy" dates.

BTW, be thankful you're not using STM32 or iMXRT1060..., many-many hidden bugs with no work-arounds and a terrible lack of documentation.

regards,
Bill

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Thanks Bill - hey I didn't realize it was you the had the idea of the XRES buffer. I built one for this project based on that. I used 7404 because that's what I have in my "way back TTL" drawer. Used one driving the other 5 in parallel.

But I found that I could not initially program the part with the 100uF in the circuit. When I removed the 100uF, I could program, then for some reason after that I could put it back in and debug. I read that it needs to discharge VDD in 100us... 100uF means driver R must be 0.3 ohms for 3 time constants = 100usec. So even that TTL driver doesn't meet that number, not really even close. So maybe 100usec is not really accurate?

Seems not having XRES is the main issue for me. 

I only use these because they are the lowest cost parts, so for projects that absolutely need to be lowest cost I don't have any choice, other than looking elsewhere. And I am more a hardware engineer than software, that's why I love PSoC. I am going to take some time to find the lowest cost PSoC that still used XRES and try to avoid the 4013/14 parts from now on. I feel like I know how to make them work but not willing to take a chance that there are still other bugaboos that I haven't discovered just yet.

So thanks again - appreciate your insights.

Dan

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Hello Dan.

The 100us originated from Cypress PSoC4 Programming Guide.  In reality, it's much longer, as in ms's (for Kitprog).  Maybe it's 100us for Miniprog?  Could also be dependent on firmware release in Kitprog.

I too have the hardware slant.  And I went for cheap PSoC's.  Digikey has several for under $1 (and under 50cents) for the expired 'best-before' date code.  Manufacturers won't use them, but I will.  And some of those parts have XRES pin.

BTW, I've used that buffer circuit to program 4245's, 5688, 5888 PSoCs.

And, despite what it says in Cypress documentation, put a 10k pull-up resistor on dedicated XRES pin.  I've never found this specific internal pull-up to function properly.  Other GPIO pull-ups seem to work just fine.

Have fun with your projects.  Ask questions on the forums when you get stuck.

Bill

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