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NXTY_Tatebayasi
Level 5
Level 5
Distributor - NEXTY (Japan)
50 questions asked 25 likes received 250 sign-ins

Hi,  community

I was looking at the datasheet and was wondering why the current flowing in Deepl sleep mode for PSoC4000S is 2.5µA(typ) and max 60µA?
Since most of the peripherals are stopped in Deep sleep mode, I figured that the inherent design effects are almost negligible.
What is the reason or idea behind the data variation?

PSoC 4000S Data Sheet

NXTY_Tatebayasi_0-1694428980574.png

 

Best Regards, 

Chihiro Tatebayashi / NEXTY 

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1 Solution
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

@NXTY_Tatebayasi ,

As @Rohan136 pointed out, the variation is due to temperature range.

Normally, the higher current (60uA) will be at the higher temperature (85C).   This is because silicon junctions tend to leak more at higher temps.   Also, the internal configurations of analog circuits, tend to be more prone to leakage and 'sneak' paths due to current biasing.

Therefore, if during deep sleep you can make sure the all analog circuits are turned off (such as LPCOMP), then your risk of 60uA @ 85C is lower.

Also, if your application is not going to see the higher temps, you can estimate a lower sleep current.

Len
"Engineering is an Art. The Art of Compromise."

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4 Replies
Rohan136
Moderator
Moderator
Moderator
100 replies posted 25 solutions authored 10 likes received

Hi @NXTY_Tatebayasi ,

 

As mentioned in the data sheet. The varying value in the current is due to temperature range mentioned.

Rohan136_0-1694512539438.png

Regards,

Rohan

 

 

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NXTY_Tatebayasi
Level 5
Level 5
Distributor - NEXTY (Japan)
50 questions asked 25 likes received 250 sign-ins

Hi, @Rohan136 

I appreciate your response.
The latest datasheet listed the conditions that is helpful information.
Thank you for  the update !

NXTY_Tatebayasi_0-1694560608694.png

Best Regards,
Chihiro Tatebayashi / NEXTY

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Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

@NXTY_Tatebayasi ,

As @Rohan136 pointed out, the variation is due to temperature range.

Normally, the higher current (60uA) will be at the higher temperature (85C).   This is because silicon junctions tend to leak more at higher temps.   Also, the internal configurations of analog circuits, tend to be more prone to leakage and 'sneak' paths due to current biasing.

Therefore, if during deep sleep you can make sure the all analog circuits are turned off (such as LPCOMP), then your risk of 60uA @ 85C is lower.

Also, if your application is not going to see the higher temps, you can estimate a lower sleep current.

Len
"Engineering is an Art. The Art of Compromise."
NXTY_Tatebayasi
Level 5
Level 5
Distributor - NEXTY (Japan)
50 questions asked 25 likes received 250 sign-ins

Hi, @Len_CONSULTRON 

I appreciate all the help you have given me.
I was able to understand the concept of max current consumption!

Best Regards, 
Chihiro Tatebayashi / NEXTY

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