PSoC 4 SCB I2C Master interrupts

[jepaz]

Been playing with I2C on the PSoC 4 managed to get it working with some blocking code (while loop until write or read is completed) however now I need to speed things up so I was thinking a great approach would be to have a interrupt routine with maybe three states that happen after  the write sequence is started

           I2C_I2CMasterWriteBuf(addr, &writeBuffer, 1, I2C_I2C_MODE_COMPLETE_XFER);

interrupts

STOP -> end of write  if the registry used is readable start reading sequence of the right length -> I2CMasterReadBuf(...)

NACK-> end of read, convert the read buffer values to the right program variable

ERROR (maybe depends more on the previous tasks, not too worried about it now)

I am definitely doing something wrong in the initialize routine its not triggering the

the device is an MCP9600 (TC amplifier)  has a few different registers read/write here is a snapshot of what I have

I would appreciate any help or guidance on this I cant find much documentation on the interrups for I2C SCB

uint8 readBuffer[3];

void TC_ISR(void)
{
char msg[10];
uint8 status = 0;
uint32_t source = I2C_GetMasterInterruptSource();
if (source & I2C_INTR_MASTER_I2C_STOP)
{

I2C_ClearSlaveInterruptSource(I2C_INTR_MASTER_I2C_STOP);
/* Check the packet length */

uint8_t reg = TCsel->currreg;

switch (reg)
{
//16 bit registers
case (HOT_JUNC_TEMP):
case (DEVICE_ID): 
I2C_I2CMasterReadBuf(TCsel->addr, readBuffer, 2, I2C_I2C_MODE_COMPLETE_XFER);
break;
//8 bit registers
case (DEVICE_CONFIG):
I2C_I2CMasterReadBuf(TCsel->addr, readBuffer, 1, I2C_I2C_MODE_COMPLETE_XFER);
break;
}

/* Clear the slave write buffer and status */
I2C_I2CMasterClearWriteBuf();
I2C_I2CMasterClearStatus();

status = 1;
}else if (source & I2C_INTR_MASTER_I2C_NACK)
{

I2C_ClearSlaveInterruptSource(I2C_INTR_MASTER_I2C_NACK);
switch (reg)
{
case (HOT_JUNC_TEMP):
//read buffer to variable
break;
case (DEVICE_ID): 
//read buffer to variable
break;
case (DEVICE_CONFIG):
//read buffer to variable
break;
}
}

void TC_Init(void)
{
I2C_Start();
CyDelay(500); // ms
I2C_SetCustomInterruptHandler(&TC_ISR);
I2C_SetMasterInterruptMode(I2C_INTR_MASTER_I2C_STOP|I2C_INTR_MASTER_I2C_NACK);
TCsel=&TC_a; 
}

[Aashita_R · Accepted solution]

Hi @jepaz ,

Can you please have a look at this community thread here :  Solved: PSoC4200L I2C Master Interrupt Example code - Infineon Developer Community  for your use case? Also, can you let us know why do you need interrupt at the master's end since master will be calling the read and write commands? For the implementation part, you can have  a look at I2C_SCB_IRQ.c file which explains APIs for controlling the interrupts with I2C.

Please feel free to add in case of any further query.

Best Regards,

Aashita

[jepaz]

Hi Aashita,

yes I agree with you every sequence needs to be triggered my plan was to use the interrupt to time the sequences.

for instance to start a read sequence the function sends the first write command, then the interrupt is triggered and I have captured what command was started, with that in the interrupt I will follow with the appropiate readbuff routine, then again when this one is completed the interrupt is triggered again and I shift all the info from the buffer to the relevant variables depending on the command.
will have a two blocks inside the interrupt one for when a Write sequence is completed, and one for when the Read sequence is completed.

have you seen something like this??

thank you!