PSoC 4 BLE is a single-chip SoC that integrates the following:
- ARM Cortex-M0 CPU up to 48 MHz
- 256/32Kb, 128/16Kb Flash/SRAM (128Kb sampling now, 256Kb coming soon)
- 2.4 GHz Bluetooth Low Energy Radio with Integrated Balun
- 4 x Opamps (operational in Deep-Sleep Mode)
- 2 x Comparators (operational in Deep-Sleep Mode)
- 1 x SAR ADC 12bit, 1-Msps with 8-ch Sequencer
- 1 x CapSense CSD block for touch-sensing
- 4 x TCPWM (Timer/Counter/PWM) blocks
- 2 x SCB (Serial Communication UART/SPI/I2C) block
- 4 x UDB (Universal Digital Blocks, PLD-based programmable logic) blocks
- 1 x Segment LCD block
- 36 GPIO
- Five low-power modes (Active, Sleep, Deep-Sleep, Hibernate, Stop Modes)
A block diagram of the device can be see here: PSoC 4 BLE Block Diagram
The device datasheet (prelim) is available here: PSoC 4 BLE Datasheet
