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Hi all,
I am trying to optimize the resolution of a capsense board I have that works with a 5 by 8 CSX matrix. It works very well, with dimensions of 2.5mm electrode side length, and 0.5mm gap between each electrode
I plan on turning this into a 6x9 matrix, but I am unsure about where I should cut first:
1. should I keep the electrode size to gap distance ratio the same (i.e. make the electrodes 2mm side length and the gap 0.4mm)
2. Or should I instead reduce mainly the electrode size (i.e. 1.8mm side length with the gap kept at 0.5mm)
3. Or else should I try to optimize the electrode size and reduce the gap between them? (maybe 2.2mm side length with 0.25mm gaps)
If you can explain why one is favorable over the other, it would be perfect!!
I am asking this because I did not find any guidelines in the capsense design guide specifically for these dimensions. Please refer me to any doc if you think of any
Thank you!!
Solved! Go to Solution.
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PSoC 4 MCU
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It is recommend that reduce the gap to 0.15mm, Others are equally distributed to the length of the side.
Generally, we recommend the following sizes to our customers:
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It is recommend that reduce the gap to 0.15mm, Others are equally distributed to the length of the side.
Generally, we recommend the following sizes to our customers:
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Thank you, you answered my question, however I was wondering what do you refer to as "bridge width?"
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Please check the previous response: bridge 0.1mm-0.15mm.
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@LinglingG_46 wrote:
Please check the previous response: bridge 0.1mm-0.15mm.
I meant what does bridge mean, but I finally found it meant solder mask bridge. thanks.