We need to generate accurate timing / waveform output using PSoC4 device.
PSoC4 does not have a built in crystal oscilltor support.
Internal IMO is +-2%, trimmable to certain range, (this is not sufficient and correct compare to crystal oscillator)
External crystal oscillators are expensive and consumes more power.
Do you have any suggetion on this issue?
There are Watchdog chips with watch crstal oscillator which is reasonably low power. You may be able to use the clock signal to trim the internal oscillator.
Some thoughts -
1) Use of a onchip gate for OSC element, like shown in Fairchild Ap Note, is
a compromise. First on chip oscillators, device size used, big impact on power.
Second there is no temp compensation in a plain vanilla CMOS gate. Third
device to device variations impact osc loop, so startup, reliability are all potential
2) There is a technique, at manufacturing test, to input, to a pin then counter chain
to measure F, a high precision clock of known F. A measurement is made and that
determines a G correction for all future measurements. That of course does not
comp for T and V. To do T, a technique used in industry, is to force large currents thru forward
biased pin diode, to heat up a part, then swicth to normal mode operation, and take several
readings over temp to establish a least squares error curve fit or power equation coef-
ficients. V of course is a precision programmable power supply, and it is swept thru a range,
and offsets to precision F are recorded and used in future reading interprolation.
I think your calibration approach is good. However, it would be very time consuming during production.
One way to do it is use a external low power oscialltor to generate a 1 hz signal and internally use a counter with the master clock as the input with the 1 HZ as the gate, every second check the deviation of the count and adjust the internal calibation value as needed.
One trades off cost-external components-accuracy-time-precision-architecture-reliability
in a design. The approach I show is used extensively in precision test instrumentation,
used on our workbench instrumentation..
That approach can take out the T & V dependance of your external oscillator.
One approach recently, for high accuracy, low cost, use of GPS chips to develop
gate. Immune to T and V, but take external components, hence cost and reliability.
Buit then we are just speculating, as we do not know what poster needs in performance
Thanks every one for giving various ideas.
More details about our intended project:
1) We will not be that keen on low power, as we are now allowed to put hefty battery of up to 800mAH, still a low current consumption will be appreciated.
2) We will be generating digital waveform pattern with frequency ranging from 30Hz to 35KHz. Absolute timing accuracy wished will be +-0.008% to +-0.01%. Say e.g. 1 HZ or better at 10000 HZ .
(operating product temperature between 15 C to 48 C)
3) This will be moderate volume product, so, ease of calibration and time to calibrate should be reasonable.
I will appreciate more insight from community in using PSoC4 to achieve the end result.
For this accuracy, the best may be using crystal oscillator. But if cost is an issue, may be a crystal with a low power cmos gate/inverter IC would do the job. Or you can try one of the new MEMS oscillators as well.
The PSoC4 only has P0_6 as a connection so I am curious of how to use an external crystal with the PSOC4.
On the demo board, they use eco_out (P7.1) and eco_in (P7.0) for this, not ext_clk (P0.6). I'm not sure why these two "external clocks" are on different pins.
As a followup, is there any reason one should not just create a Pierce Oscillator by using an internal device and driving the signal back to the external crystal as shown conceptually in this ap note?
If not, an ap note on best way to implement such would be a great idea for Cypress to do for the PSoC4.
I think you can implement that. But given the performance of the PSoC4 comparator, I would not use it with a crystal faster than 10MHz (or even maybe 4).
The requirement is for 48 Mhz clock, one would not attemp that with
onboard comparator, 150 nS typ response times (componet datasdheet,
although conflict, datasheet shows 38 nS, still too slow for 48 Mhz), rather
a CMOS inverter would be used. AN54439 is not a 48 Mhz solution as there
is probably not enough G in an internal inverter in linear region to sustain
oscillation at 48 Mhz, especially over temp. In any event uncompensated simple
inverter would not achieve the accuracy required over any significant temperature
Some help, attached doc for considerations.
Thank you Dana for that explaination. That really helped. Considering that I went for the 4 vs the 5lp for cost, that savings just got significantly marginalized. Guess I should have done more homework. 🙂
Your problem I think still is there using PSOC 4 or 5 LP, because of the
100 ppm over temp requirement. Stated another way you still can achieve
a lower cost by using PSOC 4.