In PSoC4 Cypress kit, is it possible to route pins through SmartIO keeping original pins unaffected

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I am trying to route SPI pins (2.2, 2.1, 2.0) to pins (2.7, 2.6, 2.5) through SmartIO.

After routing pins, I am getting signals both at (2.7, 2.6, 2.5) and (2.2, 2.1, 2.0). I want signals output only at (2.7, 2.6, 2.5) and I want to use 2.2,2.1,2.0 for other purposes. Is it possible in Cypress PSOC4-041XX kit?

I am using the configuration as shown below. I am getting spi clk both at 2.7 as well as 2.2, why is that so?

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Please post your code So we can check it . By  clicking on file and then create workspace_bundle and select minimal.