Using EZ-BLE the Cortex is visible on debug config, but using the virgin module CYBLE-012011-00, nothing seems to be recognized.
Can you provide the schematic showing the hardware connections between the programmer and target virgin module? Also, please provide steps to recreate your issue.
Problem Solved, the VDDR was jumped to VDD, I added a Bead 330ohm 100Mhz in VDDR line and now I can Flash using the Ulink2. using SWD.
But I can't stop de device to debug or verify the data flashed.
Schemtic is just, direct connected SWD DIO,CLK on P0.6 and p0.7, GND, VDD and VDDR
VDD on 3.3Vdc
VDDR 3.3Vdc through the described bead.
the 3.3V power supply is 1A stable
You need to also have the XRES connected depending on if you are using Power cycle or reset mode of programming. Please refer to the Physical Layer section (Page#14) of the following document for more information: http://www.cypress.com/file/409516/download
Can you elaborate more on the error seen when the debug fails?