How to share IO between SPI module and I/O Pin functionality during runtime

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RuGl_1600761
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In my application Psoc4 has to serve a device that could be configured  in SPI or parallel mode during runtime. In SPI mode pin named D0 has to be configured as MTSR, D1 has to be configured as SS,  D2 has to be configured as SCLK and  D3 has to be configured as MRST. In parallel mode  D0...D3 are part of the parallel IO (D0...D7) offering bidirectional IO. How to implement this switch on the fly?

rgl
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Hari
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750 replies posted 500 replies posted 250 solutions authored

Hi @RuGl_1600761

 

To achieve this, you need to write the registers of the GPIO manually for it to behave as a software controlled GPIO. You need to set the HSIOM so that the functionality is firmware controlled GPIO, set the drive modes and write the data registers for output/read the PS register for input. 

The following code toggles between UART and normal GPIO functionality on pin P3.0 and P3.1 - 

        if(mode == 0)
        {
            /* Write the HSIOM for UART functinality */
            val = CY_GET_REG32(CYREG_HSIOM_PORT_SEL3);
            val = val | 0x00000099;
            CY_SET_REG32(CYREG_HSIOM_PORT_SEL3, val);
            
            /* Set the drive mode */
            val = CY_GET_REG32(CYREG_GPIO_PRT3_PC);
            val = val | 0x01;
            val = val & 0xFFFFFFFE;
            CY_SET_REG32(CYREG_GPIO_PRT3_PC, val);
            
            UART_Start();
            UART_SpiUartPutArray("Hello", 6);
            CyDelay(100);
        }
        if(mode == 1)
        {
            UART_Stop();
            /* Write the HSIOM for software controlled GPIO functinality */
            val = CY_GET_REG32(CYREG_HSIOM_PORT_SEL3);
            val = val &0xFFFFFF00;
            CY_SET_REG32(CYREG_HSIOM_PORT_SEL3, val);
            
            /* Set the drive mode */
            val = CY_GET_REG32(CYREG_GPIO_PRT3_PC);
            val = val | 0x3F;
            val = val & 0xFFFFFFF6;
            CY_SET_REG32(CYREG_GPIO_PRT3_PC, val);
            
            /*Write the data register for toggling the pin */
            val = CY_GET_REG32(CYREG_GPIO_PRT3_DR);
            val = val |0x03;
            CY_SET_REG32(CYREG_GPIO_PRT3_DR, val);
            CyDelay(500);
            /*Write the data register for toggling the pin */
            val = CY_GET_REG32(CYREG_GPIO_PRT3_DR);
            val = val & 0xFC;
            CY_SET_REG32(CYREG_GPIO_PRT3_DR, val);
            CyDelay(500);
            
        }

 

Best regards, 
Hari

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