How to set "averaging mode" in Modus Toolbox2.2 PSoC4 SAR ADC

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YunHuaD_81
Employee
Employee
25 sign-ins 10 sign-ins 5 replies posted

Hi Support Team,

I build a project in Modus ToolBox2.2  about SAR ADC.    I will enable hardware averaging :

1  The following three configuration options are not covered in the initialization code, and using code as an example, can you explain the meaning of each in detail.

"Sequential,Sum"

"Sequential,Fix"

"Interleaved,Sum"

What are the APIs involved in this feature?

 

Thanks!

 

 

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1 Solution
Vasanth
Moderator
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250 sign-ins 500 solutions authored First question asked

Hi ,

This configuration sets how the hardware averaging mode operates. If Sequential, Sum is selected, each ADC conversion result is added to a running sum. It’s then shifted at the end of the scan so that it fits into a 16-bit result word. If the Sequential, Fixed mode is selected, accumulated result is shifted back into a 12-bit result. In either sequential mode, the scan pauses on the channel being averaged and all the samples for the average are taken before moving onto the next channel in the scan. This can reduce the maximum available scan rate substantially when any channel in the scan is averaged in this way.

For this reason, the Interleaved, Sum mode is also available. In Interleaved mode, only one conversion is taken on each channel before moving on, but channels that have averaging enabled get the preset number of samples accumulated in their result register. In Interleaved, Sum mode the overall scan rate is not reduced. This means that channels not requiring averaging can still be sampled at the original scan rate. An end of scan interrupt is still
produced at the end of every scan; channels that utilize interleaved averaging are not marked as ‘valid’ until the correct number of scans have been taken.

Best Regards,
Vasanth

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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hi ,

This configuration sets how the hardware averaging mode operates. If Sequential, Sum is selected, each ADC conversion result is added to a running sum. It’s then shifted at the end of the scan so that it fits into a 16-bit result word. If the Sequential, Fixed mode is selected, accumulated result is shifted back into a 12-bit result. In either sequential mode, the scan pauses on the channel being averaged and all the samples for the average are taken before moving onto the next channel in the scan. This can reduce the maximum available scan rate substantially when any channel in the scan is averaged in this way.

For this reason, the Interleaved, Sum mode is also available. In Interleaved mode, only one conversion is taken on each channel before moving on, but channels that have averaging enabled get the preset number of samples accumulated in their result register. In Interleaved, Sum mode the overall scan rate is not reduced. This means that channels not requiring averaging can still be sampled at the original scan rate. An end of scan interrupt is still
produced at the end of every scan; channels that utilize interleaved averaging are not marked as ‘valid’ until the correct number of scans have been taken.

Best Regards,
Vasanth

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YunHuaD_81
Employee
Employee
25 sign-ins 10 sign-ins 5 replies posted

Hi Vasanth,

SAR config para as below:

Cy_SAR_Init(SAR_HW, &SAR_config);
Cy_SAR_Enable(SAR_HW);
Cy_SAR_StartConvert(SAR_HW, CY_SAR_START_CONVERT_CONTINUOUS);

 

1.  VRef = VDDA/2

2 . Vneg  is Vref 

3 .single-end

4. 12bit 

Vplus  vol is 4.5 V

The input voltage range is 0-- 2VREF, but which is actually 2.5V?

 

YunHuaD_81_0-1612492570005.png

YunHuaD_81_1-1612492606634.png

YunHuaD_81_2-1612492629331.png

 

YunHuaD_81_3-1612492665752.png

 

YunHuaD_81_4-1612492692105.png

 

YunHuaD_81_5-1612492734935.png

 

 

 

 

 

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Vasanth
Moderator
Moderator
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250 sign-ins 500 solutions authored First question asked

Hi ,

I am not sure what exactly is the question? Could you please elaborate the actual question. I will try to answer from what I understood. In case if you have used 

1.  VRef = VDDA/2

2 . Vneg  is Vref 

3 .single-end

4. 12bit 

Your range should be 0-2VREF as you have expected. Or 0-VDDA in your case. So if the VDDA is less than 5, the ADC range will be also affected. In case I have understood the question wrongly, kindly let me know.

Best Regards,
Vasanth

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