PSoC™ 4

[Len_CONSULTRON]

I'm using a CY8CKIT-042 in my design.  ALL my I/O is used for other purposes (LCD, SPI, LEDs and the such).  How can I detect the voltage of VDD with only internal resources?  This is to allow me to set the contract % for the LCD.

[Len_CONSULTRON]

Update:  contrast not contract.

[Bob_Marlowe · Accepted solution]

Have a look at the "Voltage Detect APIs" in PSoC4 System Reference Guide from Creator help menu.

Bob

PS: There is an "Edit" function to correct typos...  😉

[Len_CONSULTRON]

Bob,

That was very helpful.  Although it is not an ADC (more like a comparator), I got it to work with some minor caveats.

Code snippets:

//*****************************************************************

//

uint8  vdd_voltage(void)

{

result=CY_LVD_THRESHOLD_2_50_V; //set to lowest expected VDD value

     for(result=CY_LVD_THRESHOLD_2_50_V; (result<=CY_LVD_THRESHOLD_4_50_V); result++)

     {

          CySysLvdEnable(result);

          CyDelay(10);

          if(CySysLvdGetInterruptSource() == CY_SYS_LVD_INT)

          {

          break; // If int set, break out.

          }

     }

     CySysLvdClearInterrupt();

     return(result);

}

　

lcd_contrast[] =

{

100, // CY_LVD_THRESHOLD_2_50_V

100, // CY_LVD_THRESHOLD_2_60_V

100, // CY_LVD_THRESHOLD_2_70_V

100, // CY_LVD_THRESHOLD_2_80_V

90, // CY_LVD_THRESHOLD_2_90_V

80, // CY_LVD_THRESHOLD_3_00_V

75, // CY_LVD_THRESHOLD_3_20_V

65, // CY_LVD_THRESHOLD_4_50_V

40, // > CY_LVD_THRESHOLD_4_50_V (16u)

};

　

//*****************************************************************

//

void main(void)

{

uint8  vdd_idx;

　

     CyGlobalIntEnable; /* Enable global interrupts. */

     all_LEDs(1);  /* Add load to VDD */

     LCD_Seg_Start();

     vdd_idx = vdd_voltage() - CY_LVD_THRESHOLD_2_50_V;

     LCD_Seg_SetContrast(lcd_contrast[vdd_idx]);         /* Set the contrast for VDD voltage compensation */

　

     all_LEDs(0);    /* Remove load from VDD */

...

}

CAVEATS!!!

• The LVD thresholds aren't linear. Most are 0.1V to 0.2V steps.  The last one jumps from 3.2V to 4.5V.
• VDD needs time to settle.  I received lower threshold/voltage values if I quickly cycle the power on and off.  That's why my code snippet includes turning on and off the LEDs (higher current draw on VDD) before and after the test.

[Vasanth]

Hi ,

If you have one pin free, you can use the method specified in this blog. http://www.cypress.com/blog/psoc-hacker-blog/measuring-vdd-battery-volts-psoc4  . Refer PSoC4 implementation section.

Best Regards,

VSRS

[Len_CONSULTRON]

VSRS,

Thanks for your input.  I've created designs with battery voltage monitoring.  Sadly with this design, I have no spare inputs.  Yuk!  Oh well!

Len