Failed to enable Capsense

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yangyong
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   I am learning CAPSENSE slide on the CY8CKIT-149.  the routine and my owm project work normally in PSoC Creator IDE.  In modustoolbox2.4 IDE, The  CAPSENSE_CSD_Slider_Tuning routine  work normally。 I created a project according to this routine. In the Capsense tuner, I checked, but there was no response.  After debugging, I found that the function Cy_ CapSense_ Enable return value is CY_CAPSENSE_STATUS_INVALID_STATE.   Why CAPSENSE fails to enable?

 

 

I am attaching project .Thank.

Regards,

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1 Solution
Vison_Zhang
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First comment on KBA 750 replies posted 250 sign-ins

Interrupt will be served in CapSense initialization,  in your code  __enable_irq()  is place much to behind, cause capsense isr cannot be served normally in CapSense initialization process.

You should put __enable_irq() just before EZI2C and CapSense init code.

 

cy_rslt_t result;
cy_status status = CYRET_SUCCESS;
/* Initialize the device and board peripherals */
result = cybsp_init() ;
if (result != CY_RSLT_SUCCESS)
{
CY_ASSERT(0);
}

__enable_irq();

/* EZI2C interrupt configuration */
const cy_stc_sysint_t ezi2c_intr_config =
{
.intrsrc=EZI2C_IRQ,
.intrPriority = EZI2C_INTR_PRIORITY,
};

 

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11 Replies
LinglingG_46
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500 solutions authored 1000 replies posted 10 questions asked

Please open the CY8CKIT-149 capsense tuning demo project in Modus Toolbox. I have run it in cy8ckit-149, it works well.

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yangyong
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Yes, I know  the CY8CKIT-149 capsense tuning demo project is OK.  I mean, I  build my own project according to the demo does not work properly.

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LinglingG_46
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500 solutions authored 1000 replies posted 10 questions asked

Please compare which is different.

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yangyong
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thanks, The code is basically copied from the demo。

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compare the capsense configuration. I think you can use compare tool.

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yangyong
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OK, l compare the capsense configuration again。Can you tell me what made capsense failed to enable?

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yangyong
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Can you tell me what needs to be configured to create a capsense project on the demo board?

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yangyong
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I think it is not a configuration problem, because no matter what configuration parameters, it is impossible to affect the enabling of capsense. I now change the configuration to the same as the demo, and the code is the same. However, the capsense enable fails

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Vison_Zhang
Moderator
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First comment on KBA 750 replies posted 250 sign-ins

Interrupt will be served in CapSense initialization,  in your code  __enable_irq()  is place much to behind, cause capsense isr cannot be served normally in CapSense initialization process.

You should put __enable_irq() just before EZI2C and CapSense init code.

 

cy_rslt_t result;
cy_status status = CYRET_SUCCESS;
/* Initialize the device and board peripherals */
result = cybsp_init() ;
if (result != CY_RSLT_SUCCESS)
{
CY_ASSERT(0);
}

__enable_irq();

/* EZI2C interrupt configuration */
const cy_stc_sysint_t ezi2c_intr_config =
{
.intrsrc=EZI2C_IRQ,
.intrPriority = EZI2C_INTR_PRIORITY,
};

 

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yangyong
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thanks!

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yangyong
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Distributor - Jingchuan(GC)
5 comments on blog First comment on blog 50 questions asked

thank you very much!

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