External power connection about PSoC4

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DeXi_1316761
Level 3
Level 3
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HI,

     If the external power is 1.95V。There are two methods to connect the power. 

     1、With the external 1.8~5V power mode connection;

     2、Add one 1.8V external LDO, then connect with the external 1.8V power mode。

     If I use the capsense function yet, whether are the effect of the two methods same?  How to select?

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In addition to the above analysis, I would like to describe my view here:

System power supply: 1.95V

There are two methods to deal with it:

1: Use the 1.8v-5.5v (unregulated external; regulated internal) connection method described in device datasheet. Hereinafter referred to as method 1

2: Use the 1.8V +/-5% (externally regulated) connection mode described in device datasheet. Hereinafter referred to as method 2

The following analysis of these two methods:

1: Power supply 1.95V, if connected with method 1, for the touch system: the ripple requirement for VDD is +/- 50mV. However, if use method 2, ripple requirement is +/- 25mv. For these parameters, you can find them from device datasheet Table 12. CSD and IDAC block specifications.

2: In addition to the above effects, you have increased the cost and occupied a lot of space in the whole layout, if using method 2.

3: According to some testing result, when the power supply voltage is more than 1.8V, the sensor rawdata change caused by the voltage fluctuation of 10mV is very small, only a few counts or even less; but when the voltage is less than 1.8V, the sensor rawdata change caused by the voltage fluctuation of 10mV can reach a dozen or even dozens of counts. In other words, the closer the supply voltage is to 1.8V, the higher the ripple requirement is. You can verify this with your board.

Conclusion:

If your external regulator only supplies power to the PSoC and does not use it for other purposes, we suggest not to supply power directly to the chip with 1.8V, 1.95V(method 1) is a more optimized option.

Reference documents:

1PSoC4 Hardware Design Considerations https://www.cypress.com/file/141176/download

2PSoC4000s datasheet: https://www.cypress.com/file/230631/download

除了上面的分析之外,我在这里把我的观点描述一下:

系统供电情况:1.95V

你提供的处理方式有下面两种:

1:采用datasheet中描述的1.8v-5.5v(unregulated externally; regulated internally)连接方式。 下面称为方式1

2:采用datasheet中描述的1.8v+-5% (externally regulated)连接方式。下面称为方式2

下面是对这两种方式的分析:

1:供电1.95v,如果按照方式1连接的话,对于触摸系统:对Vddripple要求是正负50mv。但是如果采用方式2连接的话,ripple的要求是正负25mv。这个参数你可以从datasheet上面 Table 12.  CSD and IDAC Block Specifications 中找到。

2:采用外部regulator除了上面的影响外,你从成本上提高了,整个布局上也很多占用了地方。

3:从实测的数据来看,当供电电压> 1.8V 时,电压每波动10mV 带来的sensor rawdata 的变化是很小的,只有几个counts甚至更少;但是电压<1.8V时,电压每波动10mV 带来的sensor rawdata 的变化能达到十几甚至几十counts。换句话说,供电电压越接近1.8V,对电压的纹波要求越高。这一点建议你可以基于你的板子,做测量。

结论:

如果你外接的regulator只是给PSoC供电,不做其他用途,这种情况我们建议不要直接给芯片供1.8V 的电压,给芯片供1.95V是更优化的选择。

参考文档:

1PSoC4 Hardware Design Considerations https://www.cypress.com/file/141176/download

2PSoC4000s datasheet: https://www.cypress.com/file/230631/download

View solution in original post

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7 Replies
MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

If your external power is 1.95V, I think that method 1 will be the only choice,

unless you provide a regulator.

Please refer to the page 6~7 of PSoC 4 Hardware Design Considerations

https://www.cypress.com/file/141176/download

moto

P.S.

For external power 1.8V ~ 5.5V

001-Figure4.JPG

For external power 1.71V ~ 1.89V (1.95V is out of the range)

002-Figure5.JPG

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DeXi_1316761
Level 3
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Distributor - Future(GC)
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HI,

     I see。In the external 1.8~5.5V connection mode, PSoC4 could work normally.

     I know, The capsense module measure the weak signal, so it is a requirement to the stability of the power supply.  What requirements must the power(1.95V) meet? It will not affect the capsense performance. Otherwise, we must add the external LDO.

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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

I think that if the voltage range of 1.95V is within 1.8V ~ 5.5V it will be fine for the voltage.

About the current, it depends on the application you are designing.

You need to consult the datasheet of your device.

For example, in the PSoC 4 4200 family datasheet,  SID69A ITOT_GPIO

which is "Maximum Total Source or Sink Chip Current" is stated as 200 mA.

So if your power can provide up to 200 mA, it will be fine anytime.

But practically you don't need that match, probably you need to calculate

core current + CapSense Current (depends on your configuration) + current required for other peripherals.

If I take easier way, I would you an EVB which has the same or similar MCU

and measure current usage to estimate the requirement. (Then x1.2 ~ x1.5 to be safe).

moto

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DeXi_1316761
Level 3
Level 3
Distributor - Future(GC)
10 sign-ins 5 sign-ins 10 replies posted

HI, Motoo,

      I see. Thanks for your reply!

In addition to the above analysis, I would like to describe my view here:

System power supply: 1.95V

There are two methods to deal with it:

1: Use the 1.8v-5.5v (unregulated external; regulated internal) connection method described in device datasheet. Hereinafter referred to as method 1

2: Use the 1.8V +/-5% (externally regulated) connection mode described in device datasheet. Hereinafter referred to as method 2

The following analysis of these two methods:

1: Power supply 1.95V, if connected with method 1, for the touch system: the ripple requirement for VDD is +/- 50mV. However, if use method 2, ripple requirement is +/- 25mv. For these parameters, you can find them from device datasheet Table 12. CSD and IDAC block specifications.

2: In addition to the above effects, you have increased the cost and occupied a lot of space in the whole layout, if using method 2.

3: According to some testing result, when the power supply voltage is more than 1.8V, the sensor rawdata change caused by the voltage fluctuation of 10mV is very small, only a few counts or even less; but when the voltage is less than 1.8V, the sensor rawdata change caused by the voltage fluctuation of 10mV can reach a dozen or even dozens of counts. In other words, the closer the supply voltage is to 1.8V, the higher the ripple requirement is. You can verify this with your board.

Conclusion:

If your external regulator only supplies power to the PSoC and does not use it for other purposes, we suggest not to supply power directly to the chip with 1.8V, 1.95V(method 1) is a more optimized option.

Reference documents:

1PSoC4 Hardware Design Considerations https://www.cypress.com/file/141176/download

2PSoC4000s datasheet: https://www.cypress.com/file/230631/download

除了上面的分析之外,我在这里把我的观点描述一下:

系统供电情况:1.95V

你提供的处理方式有下面两种:

1:采用datasheet中描述的1.8v-5.5v(unregulated externally; regulated internally)连接方式。 下面称为方式1

2:采用datasheet中描述的1.8v+-5% (externally regulated)连接方式。下面称为方式2

下面是对这两种方式的分析:

1:供电1.95v,如果按照方式1连接的话,对于触摸系统:对Vddripple要求是正负50mv。但是如果采用方式2连接的话,ripple的要求是正负25mv。这个参数你可以从datasheet上面 Table 12.  CSD and IDAC Block Specifications 中找到。

2:采用外部regulator除了上面的影响外,你从成本上提高了,整个布局上也很多占用了地方。

3:从实测的数据来看,当供电电压> 1.8V 时,电压每波动10mV 带来的sensor rawdata 的变化是很小的,只有几个counts甚至更少;但是电压<1.8V时,电压每波动10mV 带来的sensor rawdata 的变化能达到十几甚至几十counts。换句话说,供电电压越接近1.8V,对电压的纹波要求越高。这一点建议你可以基于你的板子,做测量。

结论:

如果你外接的regulator只是给PSoC供电,不做其他用途,这种情况我们建议不要直接给芯片供1.8V 的电压,给芯片供1.95V是更优化的选择。

参考文档:

1PSoC4 Hardware Design Considerations https://www.cypress.com/file/141176/download

2PSoC4000s datasheet: https://www.cypress.com/file/230631/download

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DeXi_1316761
Level 3
Level 3
Distributor - Future(GC)
10 sign-ins 5 sign-ins 10 replies posted

Hi, Lingling,

      根据你的回复,我的理解如下:

      如果外部供电1.95V仅仅供给PSoC,并且ripple+/-50V内,则采用方式1连接。

      那如果外部供电1.95V仅仅供给PSoC,但是ripple超过了+/-50V,这种情况也是采用方式1

  等待回复中。

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如果外部供电1.95V仅仅供给PSoC,并且ripple+/-50V内,则采用方式1连接。

Answer: Yes.

那如果外部供电1.95V仅仅供给PSoC,但是ripple超过了+/-50V,这种情况也是采用方式1

Answer: Yes. 采用方式2的时候 对于capsense的应用,spec规定的ripple 范围是 +/-25 V。

更多的信息请查看对应于你使用的芯片的datasheet。

希望我的回复能给你提供一些帮助。

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