Current draw on exit from Hibernate

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MikeAustin
Level 4
Level 4
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I am playing around with a design involving a PSOC4100 BLE (specifically, the CY8C4127LQI-BL453) and am trying to sort out some issues I have with current drain when I trigger my design out of Hibernate mode with a signal on one of the GPIO.

Firstly (and this has tripped me up before) I am having to deal with the section of code Cypress have written that deals with chip initialisation.

In cyfitter_cfg.c, where the WCO is being set up (assuming its been enabled), there is a call to: 

CyDelayCycles(12000000u); /* WCO may take up to 500ms to start */

This basically just stuffs in a 500msec delay during startup, which means my code isn't actually being run for the first 500msec.  If I disabled the WCO, and rely on the ILO instead, then I can reduce that start up time to about 30msec, which is much more managable.  But, I wanted to know:

1.  Is the WCO only needed if I am firing up BLE and/or using the WDT?  If so, then I'm OK to not even enable it for most of the situations where I come out of Hibernate, as I'm not using either of these functions in my code at that point

In addition, looking at the current on startup, I'm seeing an average of about 7mA drain for the first 25msec, with a spike of about 20mA for a 3msec period at about 15msec after start up.  This then drops down to about 3.5mA once my code starts up.  I'm trying to reduce the current drain in that first 25msec to something lower, as its putting too much demand on my battery, which is causing a significant droop in VCC.  I could put some additional capacitance across VCC to try and take some of the load off the battery, but tantalums and ceramics are notoriously leaky (for example, a 100uF, 6.3V ceramic has a typical leakage of ~ 6uA, and in Hibernate mode my circuit is drawing about 500nA, so I can't really afford that option) so I'm wanting to try and spread the start up current out over a longer period so I can reduce the peaks.

2.  Does anyone know what's causing the chip to have that current spike of around 20mA during the startup sequence?  I'm trying to understand where its coming from, to see if I can either eliminate it, or reduce it somehow.

Regards,

Mike

 

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VenkataD_41
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750 replies posted 500 replies posted 250 solutions authored

Hello Mike,

1.  Is the WCO only needed if I am firing up BLE and/or using the WDT?  If so, then I'm OK to not even enable it for most of the situations where I come out of Hibernate, as I'm not using either of these functions in my code at that point

Yes. You are correct. WCO is a must only if you use the BLE in low power mode. This is because accuracy is more important for the BLE clock. 

2.  Does anyone know what's causing the chip to have that current spike of around 20mA during the startup sequence?  I'm trying to understand where it's coming from, to see if I can either eliminate it, or reduce it somehow.

The initial current consumption of the chip (before it reaches fitter_cfg.c is because of the architecture of the chip. So the user will not have any control over it. Once the code execution reaches the fitter_cfg.c the current consumption depends on the configuration the user has set in the top design. To understand more about the start-up sequence, please refer to the following application note which is applicable more or less to all PSoC families.

https://www.cypress.com/file/141051/download

Thanks and regards

Ganesh

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