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PSoC™ 4 Forum Discussions

gpsot_dev
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The doc cy_lfclk_v1_20.pdf describes a function CySysTimerDelay 

I need to programmatically configure WDT2 but it fails because SySysTimerDelay implementation in CyLFClck.c checks that  the counterNum < CY_SYS_WDT_COUNTER2

The doc cy_lfclk_v1_20,pdf does not say anything about this limitation but in the function comment  it says that the valid range is 0-1

Why? Is there another way to programmatically configure delay for  WDT2?
Thanks

 

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PandaS
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Moderator 25 solutions authored 10 likes received 50 replies posted
Moderator

Hi @gpsot_dev ,

If you refer the Architecture TRM of PSoC 4200, you will find the following block diagram:

PandaS_0-1658476431785.png

WDT asserts an interrupt or a hardware reset to the device after a programmable interval, unless it is periodically serviced in firmware. The WDT has two 16-bit counters (WDT0 and WDT1) and one 32-bit counter (WDT2). These counters can be configured to work independently or in cascade.

WDT0 and WDT1 can be configured to generate an interrupt on a match event, that is, when the counter value equals the match value. The WDT0 and WDT1 counters can also be configured to generate a reset on a match event or after three successive match events that are not handled (match event interrupt not cleared).

WDT2 can be configured to generate an interrupt based on the value stored in the WDT_BITS2[4:0] bits in the WDT_CONFIG register. WDT2 cannot generate a system reset or an interrupt with any match value similar to WDT1 or WDT0. WDT2 can generate an interrupt only on a rising edge on one of the 32 bits present in the counter. The WDT_BITS2[4:0] bits in the WDT_CONFIG register control the bit that generates the interrupt. See the WDT_CONFIG register in the PSoC 4100M/4200M Family: PSoC 4 Registers TRM for details.

 

Thanks and Regards

Sobhit

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gpsot_dev
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Thank you very much!

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gpsot_dev
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Just in case someone else runs into this, here is what I ended up doing

Sobhit, could you please confirm that this is the right approach

void WDT2_SetInterval(uint32_t wdt2_bits)
{
CySysWdtDisable(CY_SYS_WDT_COUNTER2_MASK);
CyDelayUs(500);
CySysWdtSetToggleBit(wdt2_bits);
CySysWdtEnable(CY_SYS_WDT_COUNTER2_MASK);
}

wdt_bits is a value 0 - 31 and corresponds to the interval dropdown menu in the LFCLK window

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PandaS
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Moderator 25 solutions authored 10 likes received 50 replies posted
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Hi @gpsot_dev ,

Were you able to workaround with the above function? 

Warm Regards

Sobhit

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gpsot_dev
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Yes, it works for me. The only change I made was to wait for the timer to be disabled instead of using a hard coded delay value

Here is the updated version

Thanks for help

-------------------------------
void WDT2_SetInterval(uint32_t wdt2_bits)
{
int i;

CySysWdtDisable(CY_SYS_WDT_COUNTER2_MASK);
/* CySysWdtSetToggleBit is skipped if the timer is enabled so wait up to 1 ms
*/
while(CySysWdtGetEnabledStatus(CY_SYS_WDT_COUNTER2))
{
if(i > 4)
{
break;
}
CyDelayUs(250);
i++;
}
CySysWdtSetToggleBit(wdt2_bits);
CySysWdtEnable(CY_SYS_WDT_COUNTER2_MASK);
}

 

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PandaS
Moderator
Moderator 25 solutions authored 10 likes received 50 replies posted
Moderator

Hi @gpsot_dev ,

That's great! Glad that you solved the problem.

Warm Regards

Sobhit

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