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What methods are available to tune capsense on a design that has only SWD pins available for probing?
A) Is it possible to run CapSense Tuner functionality over an SWD interface?
B) Can an Oscilloscope be used to see how a CapSense sensor is being charged then drained?
I understand Oscilloscope probes will add some amount of capacitance to change the performance.
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PSoC 4 MCU
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Hi @GrCa_1363456, If it is possible for you to reprogram the device, you might as well change the SWD pins as normal GPIO pins using the systems tab of PSoC Creator. After this, you can use the software UART component that is available in PSoC Creator and connect the TX pin to any one of the GPIOS P3.2 or P3.3. Now you can send the CapSense debug data such as rawcounts, diff counts, baseline to the UART component and view it in any serial terminal.
Bragadeesh
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Hi @GrCa_1363456 ,
1. It is not possible to tune CapSense sensors with only SWD interface. We might need some kind of a communication protocol of your choice (as supported by the device) to transmit CapSense debug data and monitor them using some logger/ viewer. Can you please let us know the device you are using? Do you have BLE connectivity in the device?
2. Yes, you can probe the capsense sensor to check whether the sensors are getting charged and discharged completely.
Bragadeesh
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Bragadeesh,
Thanks for the quick response.
The device is CY8C4125PVI-482 soldered into a production ready product. If not possible to use or reconfigure the two SWD pins, if other pins are not accessible, could a PSoC 4 kit using the same 3rd generation CapSense technology be used to tune the CapSense sensors in an existing design? The thought here is to remove the CY8C4125PVI-482 from the circuit board. Jumper in connections from the PSoC 4 kit to the sensors. Run the tuner program to determine optimal parameters for each sensor. Load the new parameters into the CY8C4125PVI-482 on another circuit board to verify functionality.
My assumptions here. Parasitic impedances from the kit will have minimal effect. 3rd Generation CapSense technology is similar in each device. Initial parameters can be determined using this method.
Greg
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Hello.
A different approach...
Re-program PSoC with SWD alternate GPIO function. Implement a software UART on these GPIO's and perform tuning, store tune data in non-volatile memory.
There is a software TX UART component in Creator.
There is also an example software RX UART written by Moto.
Solved: Software Based Uart Receive - Cypress Developer Community
After tuning, re-program PSoC with production load. PSoC always defaults to SWD function for reprogramming purposes before timing out and jumping to user code configuration.
If you don't need to debug, and sufficient FLASH/SRAM space available, the s/w UART could be integrated into production load, thus only 1 FLASH image to support. You can't perform debugging while SWD pins are configured for alternate GPIO function.
BTW, no, you can't route the SCB UART to SWD pins.
Good luck with you project.
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Hi @GrCa_1363456, If it is possible for you to reprogram the device, you might as well change the SWD pins as normal GPIO pins using the systems tab of PSoC Creator. After this, you can use the software UART component that is available in PSoC Creator and connect the TX pin to any one of the GPIOS P3.2 or P3.3. Now you can send the CapSense debug data such as rawcounts, diff counts, baseline to the UART component and view it in any serial terminal.
Bragadeesh
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Hello
There is also an example software RX UART written by Moto.
Solved: Software Based Uart Receive - Cypress Developer Community