About using PIN1 [6] of PSoC4000

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hata_3396041
Level 4
Level 4
First solution authored First like received 50 questions asked

Hello

I want  to use PIN1 [6] of CY8C4013SXI-400.

I found this thread about the PSoC 4000 IO system.
 
" P1[6] is temporarily configured as the XRES pin during power-up for approximately 100 ms, until the device enters the start-up code. Care should be taken when using this pin. P1[6] SHOULD NOT BE PULLED DOWN DURING POWER-UP (for example, connecting active-high LEDs) because the device will enter and remain in the XRES state after power-up, as the reset signal is always asserted."
 
I want to set the input setting & pull up / down and use it for conditional branching of FW processing using port logic.
 
Is it okay to use it like this if I avoid 100ms after startup?
 
Best Regards
Hayato
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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hello Hayato san,

You can use that pin for the functionality. But you need to make sure that during any POR , the pin must not have a load to ground. The device will remain in XRES state in such cases, as the reset signal is always asserted. You may use some other pin for the functionality if you cannot guarantee the pin state during any of the POR on the entire device life cycle.

Best Regards,
Vasanth 

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Vasanth
Moderator
Moderator
Moderator
250 sign-ins 500 solutions authored First question asked

Hello Hayato san,

You can use that pin for the functionality. But you need to make sure that during any POR , the pin must not have a load to ground. The device will remain in XRES state in such cases, as the reset signal is always asserted. You may use some other pin for the functionality if you cannot guarantee the pin state during any of the POR on the entire device life cycle.

Best Regards,
Vasanth 

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BiBi_1928986
Level 7
Level 7
First comment on blog 500 replies posted 250 replies posted

Hello hata.

Are you suggesting to configure GPIO P1.6 as input mode with PSoC internal config of pull-up/down?  Or, are you configuring P1.6 as an input and putting an external pull-up/down resistor on P1.6? I'm not sure of your statement.

When PSoC powers ON, it resets internally, configures internal settings and runs an internal boot process.  Then, PSoC jumps to user application code.  An external pull-down resistor connected to P1.6 will hold PSoC in reset state.  I've never tried an internal GPIO configured pull-down resistor, so I don't know the outcome.

If both a pull-up and pull-down resistors are connected externally to P1.6, this will confuse PSoC and PSoC will sometimes interpret a logic HI or a logic LOW.  Not very reliable.  If GPIO is configured as pull-up/pull-down, I don't think this is reliable.

If PSoC P1.6 is configured for internal (or external) pull-up resistor, this is okay to use.

So, I don't know how you can avoid PSoC observing a pull-down resistor in the first 100ms after power ON.  The application code has no hardware control during this first 100ms.

A pull-up resistor is fine.  Be aware, application code would always take this branch after power ON.

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