About debug select of PSoC Creator

[hata_3396041]

Hello

There is the following description in the debug select column of PSoC Creator.

”Controls whether or not to reserve pins for debugging. If any JTAG or SWD option is selected, the debugging features of the chip will be externally accessible. If GPIO is selected the pins are available for general purpose use. When set to GPIO the device can For more information see the device datasheet or Technical Reference Manual (TRM). Still be acquired with SWD / JTAG, and reprogrammed, but not for debugging.”

Where can I specifically refer to TRM for more information on this?

Best Regards

Hayato 

[DheerajK_81 · Accepted solution]

Hello @hata_3396041 ,

Please refer to PSoC Creator User Guide for more information about this option on Page#255. 

For more information on the debug interface itself, you can find this in the PSoC4 Architecture TRM. 

Regards,
Dheeraj