I have the OPTIGA SLM9670 Iridium evaluation board, which can be used with a Raspberry Pi 4.
My client has requested that we need to build a CM4 carrier board, with the TPM included.
I have designed the board, for using the TPM on SPI-3.
While the driver picks up the TPM, the TPM then withholds communication, and the driver thinks it is a v1.2 TPM, not a 2.0 TPM.
[ 6.387233] tpm_tis_status+0xec/0xf4 [tpm_tis_core]
[ 6.387262] wait_for_tpm_stat+0x5c/0x224 [tpm_tis_core]
[ 6.387279] tpm_tis_send_data+0x98/0x2a0 [tpm_tis_core]
[ 6.387294] tpm_tis_send_main+0x3c/0x120 [tpm_tis_core]
[ 6.387309] tpm_tis_send+0x54/0xe4 [tpm_tis_core]
[ 6.387460] tpm_tis_core_init+0x28c/0x5e4 [tpm_tis_core]
[ 6.387477] tpm_tis_spi_probe+0xa4/0xc4 [tpm_tis_spi]
[ 6.387498] tpm_tis_spi_driver_probe+0x40/0x70 [tpm_tis_spi]
[ 7.175807] tpm_tis_spi spi3.1: 1.2 TPM (device-id 0x1B, rev-id 255)
[ 8.184064] tpm_tis_spi: probe of spi3.1 failed with error -62
It is not a SPI/GPIO line misconfiguration, this happens, irrespective of pullup/pulldown.
This TPM works with the SPI-1, and enumerates on the system as /dev/tpm0 and /dev/tpmrm0
I am trying to interface SLB 9670VQ2.0 via SPI BUS and after configuring kernel to enable the required module, The device is going into time out mode. I also found a kernel patch which corresponds the problem of timeout but the patch is not currently integrated into the main line kernel.
My question is,
If I spare a GPIO pin as a reset pin and assigned it to SLB 9670VQ2.0 then it will be enough for the SLB 9670VQ2.0 to come out of timeout phase or do i also need an implementation at the Linux kernel driver level to toggle the reset pin?
I'm working on secure boot on TI omapl138 soc using TPM1.2 slb9645, I am able to detect TPM chip through I2C, But i didn't get any data sheet or technical reference module to know how TPM 1.2 works and register/memory addresses, To develop further can you please provide detailed documents of TPM 1.2 slb9645.
Thanks & regards
Yashwanth T LShow Less
Continuation to my last query,
Is there any patch available for TPM2.0 implementation in u-boot 2016, what snehapra has suggested, in the above link, is for u-boot v2022.
Another question is, available tpm2.0 code is based on Driver model or not ?
I'm trying to bringup TPM2.0-SLB9670VQ2.0 in "uboot2016" for IPQ8072 qualcomm chipset.
Would be great if some one pls share some docs/references or pointers.
thanks in advance..
Gourav JainShow Less
Does Infineon have a TPM module which is FIPS 140-3 compliant or certified? I currently use SLB 9670VQ2.0 which is FIPS 140-2 certified and would like to move to FIPS 140-3.
Thanks and Regards,
Hello, everyone, I bought an evaluation board iridium 9645 ( IRIDIUM9645TPMI2CTOBO1), with an SLB9645 TPM 1.2, but I can't find any datasheet to plug this board on a raspberry pi 3B (40 pins header). Could you provide the datasheet? If there is no datasheet, could you tell me what is the interest of the two jumpers, the 28 pins header, the 6 pins headers? The 26 pins header for raspberry? Where should I plug it on the header of my raspberry pi 3B, and in what way should I plug it?
Hi Infineon Team,
I'm trying to interface TI omapl138 soc with TPM1.2 slb9645 through Driver module (DM)_I2C, But facing problem with integration via U-boot not able to detect TPM chip on I2C bus. I'm looking for a U-boot driver/source code to interface TPM1.2 slb9645, Presently I am using U-Boot 2018.01.
Thanks & regards,
Yashwanth T LShow Less
We have programming requirements for SLB9665 and SLB9670, and we are evaluating to implement TPM programming/provisioning to our programming systems. We have HSM and CA server, and we need the more detail information about LPC/SPI protocol and programming flow to implement. We have tried to find the source code from github, but it seems based on the OS to execute the IC provisioning.
May i know any documents about the detail (protocol and flow and command..) for third party?