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Shraddha
Level 3
Level 3
First solution authored 50 sign-ins 10 questions asked

hello ,

 I had implemented the QSPI, the problem which I'm facing is that 

1)  to read the device id , configuration register 1 and 2 both through spi , first I tried to read the configuration register 2 i.e.  in 1s-1s-1s and then it was showing 08 by default value , that was working well 

2) after that i tried to write on the memory 0x00800003 then after that it got converted to  (4s-4s-4s) format 

3)when I'm trying to read the cfgr 2 in  4s-4s-4s  it not accepting the command which i had used 

Read Mode:- CS(high)--->CS(low)--->cmd(65)--->address(0x00800003)---->read cycles

Write Mode:- CS(High)--->CS(low)---->cmd(06)--->cmd(71)--->cmd(0x00800003)--->cmd(68)

Read Mode:- CS(High)---->CS(low)----> cmd(65)--->cmd(0x00800003)--->read cycles

its not working let me know where I'am going wrong output wave form i have attached 

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1 Solution
AlbertB_56
Moderator
Moderator
Moderator
500 replies posted 50 likes received 250 replies posted

Hello Shraddha,

In 4S-4S-4S Quad mode, please verify and confirm that Config. Register-1 (CFR1N[1] = 02h, which sets Quad SPI Interface I/O width to 4 bits.  The contents of Config. Register-2 (CFR2N[7:0]) = 68h.   In the waveforms attached, I do not see the register settings for Config. Register-1.

 

Best regards,
Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

 

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4 Replies
AlbertB_56
Moderator
Moderator
Moderator
500 replies posted 50 likes received 250 replies posted

Hello Shraddha,

In 4S-4S-4S Quad mode, please verify and confirm that Config. Register-1 (CFR1N[1] = 02h, which sets Quad SPI Interface I/O width to 4 bits.  The contents of Config. Register-2 (CFR2N[7:0]) = 68h.   In the waveforms attached, I do not see the register settings for Config. Register-1.

 

Best regards,
Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

 

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Shraddha
Level 3
Level 3
First solution authored 50 sign-ins 10 questions asked

First of all these all configuration i did only for configuration register 2 , 

1. i want to write first in Configuration register 2  so therefore iam writing 68 to enable quad mode (4s-4s-4s) that it self its not writing, when iam trying to read MISO line is not triggering only 

basically my plan was to enable first configuration register 2(4s-4s-4s) then configuration register 1(1s-4s-4s)  

configuration register 2 itself is not happening 

can you please tell me the whole format ,its urgent 

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AlbertB_56
Moderator
Moderator
Moderator
500 replies posted 50 likes received 250 replies posted

Hello Shraddha,

Using the address of 0x00800003, you are attempting to read from, and write to, volatile Config Register-2 (CFR2V). Therefore, to write 68h to CFR2V, use the WRENV_0_0 (command 50h), instead of WRENB_0_0 (command 06h), as the volatile Status and Configuration registers, can be written by sending the WRENV_0_0 transaction, followed
by any write register transactions (WRAR : command 71h).  

Before the Write Registers transaction can be accepted by the device, a Write Enable (WREN_0_0), or Write
Enable for Volatile Registers (WRENV_0_0) transaction must be received. After the Write Enable command has been decoded successfully, the device will set the WRPGEN in the Status Register to enable any write operations.

Please let me know of your findings.

 

Best regards,

Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

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Shraddha
Level 3
Level 3
First solution authored 50 sign-ins 10 questions asked

command to write in configuration register 2 

cs(high)--->cs(low)--->cmd (50)write enable volatile--->cs (high)--->cs (low)--->cmd (65)read status register 1--->address (0x00800000)--------->read cycles( 8 bit)--->cs (high)--->cs (low) ----> cmd (71)write--->(address cfgr 2)0x00800003------>data(68)--->cs (high)--->cs (low)--------->cmd (65)read cfgr register 2--->address (0x00800003)---->read cycles( 8 bit)--->cs (high) 

data i can see is 11 its some junk data what is the issue

 

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