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Hi,

We have designed a hardware prototype that includes a S25FL127S Flash purely for storage (no XIP required) purpose.

The host MCU is Renesas Synergy S7G2. This MCU has support for QSPI.

Accordingly, we have connected all pins required for QSPI with the host MCU. The IO2 and IO3 pins that server alternate purpose of WP# and HOLD have been pulled up using an external 10K resistors.

I can successfully read manufacturer ID (01h), type of memory interface (20h) and memory density (18h).

I have been trying for getting the flash operations functional but I can only read all 0xFF. The support from host MCU vendor has indicated that the initialization sequence could be a problem.

Is there a simpler way of knowing what all actions are required to initialize the chip and what values are to be set up in Status Register 1, Status Register 2 and Configuration Register 1 to support QSPI mode?

Another question: When I intend to use QSPI interface for flash Read, Erase and Page Program operations, what commands should I use out of the below?

(Taken from Section 11.1, page 113, S25FL127S Datasheet):

For Read:

• (03h) Read (3-byte Address)
• (13h) Read (4-byte Address) 
• (ECh) Quad I/O Read (4-byte Address)

For Erase:

• (20h) Parameter 4 kB-sector Erase (3- or 4-byte address)
• (21h) Parameter 4 kB-sector Erase (4-byte address)

For Page Program:

• (02h) Page Program (3- or 4-byte address)
• (12h) Page Program (4-byte address)
• (32h) Quad Page Program (3- or 4-byte address)
• (34h) Quad Page Program (4-byte address)
• (38h) Quad Page Program (3- or 4-byte address)

Hello,

Could you tell the specification of the Chip Erase Time (typ/max) in S29GL128S?

I found it out for S29GL064S in the datasheet,  but the S29GL128S datasheet doesn't have.

MPN  S29GL128S90TFI010

Best Regards,

Naoaki Morimoto