Nor Flash Forum Discussions
I'm looking for an IBIS model for the S70GL02GT12FHBV13 that supports 1.8V I/O operation. I found two models at this link http://https://www.cypress.com/search/all/S70GL02gt?sort_by=changed&f%5B0%5D=meta_type%3Asoftware_tools ,but they only support 3V (3.3V?) I/O. I used that model for simulating the address and control inputs (driven by a 1.8V driver), though I'm not sure the results are correct. However it does not help trying to simulate the S70GL02 driving the data bus. Is there another similar model that supports 1.8V operation that might be close?Show Less
We would like to use S70FL01GSAGMFI013 spi flash memory and interface it with a mcu. However we are really new with flash memories and we would like to ask if there is any driver (C code with functions how to read and write this flash memory) for spi S70FL01GSAGMFI013 flash.
We have by the way noticed that on the website there is a zip folder provided called "Low Level Driver for SPI Flash" , but since we are really new with flash memories we don't really know if this driver could be used for the S70FL01GSAGMFI013 flash and which functions to use. Any help would be appriciated.
I have tried to configure the SPI-NOR flash to QPI mode by configuring CR2V with value 0x48.
After doing this I am trying to read the Read Quad Identification (RDQID AFh), It is not giving the valid value,
Please help me in QPI mode enter and exit scenarios.Show Less
We employ Cypress flash device P/N S29JL032J70TFI310 in our product design. There is application code residing in the bottom-most sector SA0 (0x0000) of the subject device that needs to be protected from inadvertent erasure.
Per the attached Cypress datasheet 002-00857 Rev. *J, paragraph 8.10 (page 22), I can do an in-system sector protect of any flash sector such as SA0. Implementing this algorithm as depicted in Figure 2. In-System Sector Protect/Unprotect Algorithms (page 24), it appears to be successfully performed as signified by a data value “01h” <Data = 01h?> when any byte location within the boot sector is read back. However after protecting the boot sector per the algorithm, when I subsequently execute a chip erase command the boot sector is erased with all other sectors.
Is that correct device operation or am I incorrectly implementing or interpreting the sector protect algorithm? In other words, does the in-system sector protect pertain only to the individual sectors and will not protect those sectors from an inadvertent chip erase command?
What are the min and max dimensions of "D" "E" and "E1" on SOC008 package of S25FL064LABMFI010?
Thank you & Best Regards,Show Less