Nor Flash Forum Discussions
Is there a time limit such as a timeout if there is a temporary waiting time during transmission / reception? If so, what would it behave? I couldn't find it in the datasheet.
In another device, there was a case where the SCL and SDA stuck at Low for a certain period of time (about 100ms) due to the SW processing of the master during I2C communication, and as a result, the slave device unintentionally timed out and the slave device reset. When I checked the specifications of the chip, the time-out specifications were listed, but it was not made with due consideration for SW.
I would like to check the specifications of the device to see if other devices are also considered.
Thanks,
Tetsuo
Show LessHello,
I am using S25FL512SAGBAEA10 SPI flash and I have a question based on the timing with the write enable command (06h) and the page program (02h). Essentially I am wondering how long do I have to wait before sending a page program command after sending the write enable command. I just want to write a file to the SPI flash.
The datasheet says "CS# must be driven into the logic high state after the eighth bit of the instruction byte has been latched in on SI. Without CS# being driven to the logic high state after the eighth bit of the instruction byte has been latched in on SI, the write enable operation will not be executed". This statement I feel is true but doesnt tell you everything you need to know. I have tried to follow this with a page program command immediately after sending a write enable command and it has not worked even when I have comfirmed that the CS# goes back high in between with a 20 ns delay in between. Is there some delay I need to have in between the commands so that the write enable actually executes? Is it based off SCK? I'm trying to find this in your datasheet but I'm failing to find it. I'm using Document Number 001-98284 Rev *Q.
Note: I can set the write enable bit but theres some timing relationship between commands that must be getting violated.
In the meantime I am going to try a 100 ns second delay to see if that fixes things and try to re-read the datasheet and try to get the simulation model for the SPI flash working.
Thanks, Dan
Show LessHi,
我们正在用MT25QU01GBBB8E12-0SIT,目前正在评估S70FS01GSDSBHI210。
帮忙看看和这两个料在读写,die的切换,QSPI模式切换、进入退出4 byte模式命令是否有差异?谢谢!
S70FS01GSDSBHI210 MT25QU01GBBB8E12-0SIT
Show LessWe used to use s29al008d before, but this Flash Memory is no longer available. I want to find a replacement Flash Memory or find the latest version number of this Flash Memory.
THANKS!
Show LessDears.
I’m looking for the QSPI memory which meets the following specification. But I couldn’t find proper cypres PN.
Please give me your recommended part number.
- Interface Frequency : 133MHz
- Density : 128Mbit or 256MBit
- External Reset needed
- Interface : QSPI (D0 ~ D3)
- Package : WSON 6x5 or FAC024
- Operating Voltage : 1.8V
Br,
WonjinHan
Show LessHi,
I am using S25FL127SABMFI003 memory in a project.
The OS used is Linux and I am not sure what driver to use.
What is the driver avaliable in Linux for S25FL127SABMFI003 memory?
Thanks,
Miguel
Show LessInfineon’s HyperBus Memory Interface and Protocol interface have come a long way since their 2014 introduction by legacy Cypress, now an Infineon company. Today, Infineon’s many memory families include the HyperFlash (3V S26KL-S, 1.8V S26KS-S), HyperRAM 2.0 (3V S27KL-2, 1.8V S27KS-2) and New Semper Flash with HyperBus (3V S26HL-T, 1.8V S26HS-T).
Chipset partners can request HyperBus Memory Controller RTL IP, which is provided free-of-charge, to integrate it as Hard IP into their MCU or SoC. Additionally, customers relying on FPGA, can also download Infineon Hyperbus Memory Controller RTL IP to integrate it as Soft IP into their FPGA enabling easy Flash and RAM expansion for their FPGA-based system. To request access to the HyperBus Memory Controller IP Package, please complete this form.
To find a list of chipset partners and chipset part numbers supporting HyperBus Interface and qualified with Infineon memories or for more information, please visit our frequently updated website for the HyperBus Memory Chipset.
Show Less
Hi All,
We are using Cypress NOR Flash "S25FL128LAGNFV010" this along with RTOS configuration.
From total 16MB of flash, 14MB is user space and rest of 2MB is reserved.
Could you provide us latest copy of FTL and SLLD.
That will be great help to us.
Show Less