Nor Flash Forum Discussions

Hi I am trying to integrate S29GL01GP parallel NOR flash with am335x(linux 4.4).  I got reference from TI dra7-evm  board using chip S29GL512S. 

http://lists.infradead.org/pipermail/linux-mtd/2014-July/054755.html

 Does both chips support same CFI commands set ?

I have the following FLASH part number: S25FL128SAGMFIR01

​I'm using the following datasheet: http://www.cypress.com/file/177966/download

I have a confusion regarding the sector organization of my device.

On section 7.2 Flash Memory Array (pp.46), which table applies to my device?

Table 7.4 or Table 7.5 ?

0 = (sector type) Uniform 64-kB sectors

Given:

S25FL = Device Family

128= density 128 Mbit

S = Device tech 0.065 µm MirrorBit Process Technology

AG= Speed 133 MHz

M = package type)16-pin SO package

F = package materials Lead (Pb)-free

I = temperature range Industrial (-40°C to + 85°C)

R = (Latency Type, Package Details, RESET# and V_IO Support) EHPLC, SO footprint with RESET# and VIO

0 = (sector type) Uniform 64-kB sectors

1  = (Packing Type) Tube

I am programming my new PCB with S25FL127SAB and I wish to initialize it correctly.  In particular I want to set up the configuration register for quad operation but do not want to waste any of the 100K erase/write operations etc.

I have prepared a basic list and would like some help to complete the initialization from here:

Desired setup and operations:

Use 8 pin package
Operate in quad mode (QSPI)
Four byte addressing mode
XIP mode except during initialize, erase and program operations

RESET FUNCTION:

Send device QSPI_COMMAND_XIP_EXIT_CODE (0xFF)
Send device QSPI_COMMAND_RESET_ENABLE (0x66)
Send device QSPI_COMMAND_RESET_DEVICE (0x99)

INITIALIZE FUNCTION:

Initialize microcontroller for QSPI operation 50 Mhz
Call reset function (see above)
Read and verify device information

Send device QSPI_COMMAND_READ_ID (0x9F)
Read Manufacturer – works OK =  0x01
Read memory type – works OK =  0x20
Read memory capacity – works OK =  0x18

From here to end of initialization need Cypress help !!!

Want to set for quad operation - set non-volatile once, not with each power on cycle

Want to set up for 4 byte addressing

Any other initialization that is needed.

Thanks for your help !!!

Steve Dillier

HighPoint Design

972.753.2622

    Dear All

           i have a number of 2G mobile phones with Spansion chipset in them . number : S29GL032N90TFI03. is there a tool for editing the IMEI or flashing the mobiles ?

    Thank you

Hello,

I am using TI's TPS62732 in my design to power up SPI flash memory (Cypress's S25FS256SAGNFI001).  I have attached the schematic for reference. 

There is a problem in voltage output from TPS62732  when Flash chip mounted. My Observations are below. 

Please let me know if anything wrong with the circuit or any suggestions would be highly appreciated. 

Observations:

BEFORE FLASH MEMORY IS SOLDERED.

Output of U6 regulator (TPS62732) is 1.9V

AFTER THE FLASH MEMORY IS SOLDERED

Output of U6 regulator (TPS62732) is fixed anywhere between 2.2V and 3V .

Any suggestions on what could be going wrong?

DI_5/ON-BYP-TPS62732 = HIGH = 2.8V
DI_4/ON-TPS22860 = HIGH = 2.8V

Regards

Lakshmikanth. 

I'm not able to write in S25FL512S using CY 022001 BLE by SPI communication. I need a simple Read/Write code for this hardware combo only.

Thanks in advance.

I have purchased a S25FL127S 128 Mbit (16 Mbyte) 3.0V SPI Flash Memory (here the Documentation link: http://www.cypress.com/file/177961/download) and wanted to make use of the password method in ASP. Before configuring anything i tested erase and program page and everything works fine.

Before doing anything i read the related registers:
PASS:             all values are 0xFFs
PPB Lock Bit:     0x01        (unprotected PPB bits)
ASP:             0xFF 0xFE    (no security method configured)
PPB Bit for first sector: 0xFF    (unprotected)   command 0xE2 with address 0
DYB Bit for first sector: 0xFF    (unprotected)   command 0xE0 with address 0

What i did is configured a password through 0xE8. When i read it again it shows what i configured. After that i changed the value of ASP reg to choose the software method so ASP reg[2] should be set to 0. So i used command 0x2F and sent 0xFB and 0xFE. Now i read the password again and everything is 0x00 which i expect to be correct since after configuring the password method the documentation states that is not possible to read the password again also if i read the PPB Lock bit the valus is 0x00 which means its protected. So the new values are now:

PASS:             all values are 0xFFs
PPB Lock Bit:     0x00        (protected PPB bits)
ASP:             0xFE 0xFE    (password security method configured)
PPB Bit for first sector: 0xFF    (unprotected)   command 0xE2 with address 0
DYB Bit for first sector: 0xFF    (unprotected)   command 0xE0 with address 0

Status registers is always 0x00.

Since the sector 0 is still unprotected i wanted to erase it but now it does not work anymore. And after starting erase sector i get the value of the status register to 0x23 which means Erase error.

What i also tried is run PASSU to unlock the password (0xE9) after which i get 
PPB Lock Bit:     0x01 (unprotected PPB bits)

and than try to erase again with same result.

My target is after configuring the password to be abel to protect the sectors setting their PBB bit to 0x00 but even that does not work. After issueing unlock password PASSU command i get 
PBB Lock Bit: 0x01 (unprotected PPB bits)

and now if i try to protect sector 0 through changing its PBB bit to 0 (command 0xE3 with the address parameter 0) nothing changes. i read again 

PPB Bit for first sector: 0xFF    (unprotected)

Here are the mothds i am using....what am i doing wrong?? Thanks

    

#define HIGH(x) ((x&0xff0000)>>16)
#define MID(x) ((x&0xff00)>>8)
#define LOW(x) (x&0xff)

    

void enableWrite(){
    _cs->write(0);
    wait_us(1);
    _spi->write(0x06);
    wait_us(1);
    _cs->write(1);
}

    

void waitForWrite() {
    while (true) {
        if (0==readStatus()&1)
            break;
        wait_us(10);
    }
}
int readStatus() {
    _cs->write(0);
    wait_us(1);
    _spi->write(0x5);
    int status=_spi->write(0x00);
    wait_us(1);
    _cs->write(1);
    return status;
}

    

void setPWD(char * pwd) {
    enableWrite();

    

    _cs->write(0);
    wait_us(1);

    

    _spi->write(0xE8);

    

    // do real write
    for (unsigned int i=0;i<8;i++) {
        _spi->write(pwd);
    }
    wait_us(1);
    // disable to start physical write
    _cs->write(1);

    

    waitForWrite();
}

    

//on success the PPB Lock Bit is set to one
//The PPB Lock bit can only be set to 1 by the Password Unlock command.
void unlockPWD(char * pwd) {
    enableWrite();

    

    _cs->write(0);
    wait_us(1);

    

    _spi->write(0xE9);

    

    // do real write
    for (unsigned int i=0;i<8;i++) {
        _spi->write(pwd);
    }
    wait_us(1);
    // disable to start physical write
    _cs->write(1);

    

    waitForWrite();
}

    

int readDYBSectorBit(unsigned int startAdr) {

    

    _cs->write(0);
    wait_us(1);
    _spi->write(0xE0);
    _spi->write(HIGH(startAdr));
    _spi->write(MID(startAdr));
    _spi->write(LOW(startAdr));
    int result =_spi->write(0x00);
    wait_us(1);
    _cs->write(1);
    return result;
}
//address should be the 0 address of the sector
int readPPBSectorBit(unsigned int startAdr) {

    

    _cs->write(0);
    wait_us(1);
    _spi->write(0xE2);
    _spi->write(HIGH(startAdr));
    _spi->write(MID(startAdr));
    _spi->write(LOW(startAdr));
    int result =_spi->write(0x00);
    wait_us(1);
    _cs->write(1);
    return result;
}

    

//address should be the 0 address of the sector
void protectPPBSector(unsigned int startAdr) {
    enableWrite();

    

    _cs->write(0);
    wait_us(1);

    

    _spi->write(0xE3);
    _spi->write(HIGH(startAdr));
    _spi->write(MID(startAdr));
    _spi->write(LOW(startAdr));
    _spi->write(0x0);

    

    wait_us(1);
    _cs->write(1);

    

    waitForWrite();
}

    

int readPPBLockBit() {

    

    _cs->write(0);
    wait_us(1);
    _spi->write(0xA7);
    int result =_spi->write(0x00);
    wait_us(1);
    _cs->write(1);
    return result;
}

    

void protectPPBLockBit() {
    enableWrite();

    

    _cs->write(0);
    wait_us(1);

    

    _spi->write(0xA6);

    

    wait_us(1);
    _cs->write(1);

    

    waitForWrite();
}

    

void readASPReg(char * response) {

    

    _cs->write(0);
    wait_us(1);
    _spi->write(0x2B);
    response[0] = _spi->write(0x00);
    response[1] = _spi->write(0x00);
    wait_us(1);
    _cs->write(1);
}

    

void setASPReg(char * value) {
    enableWrite();

    

    _cs->write(0);
    wait_us(1);

    

    _spi->write(0x2F);
    _spi->write(value[0]);
    _spi->write(value[1]);

    

    wait_us(1);
    _cs->write(1);

    

    waitForWrite();
}

    

void clearBlock(unsigned int addr) {

    

    enableWrite();
    _cs->write(0);
    wait_us(1);
    _spi->write(0xd8);
    _spi->write(HIGH(addr));
    _spi->write(MID(addr));
    _spi->write(LOW(addr));
    wait_us(1);
    _cs->write(1);
    waitForWrite();
}

   

Hi,

We are using the S25FL256SAGMFV001 and one of the devices FREEZE bit was set to "1" how can I set it back to "0" in the device user guide it is stated - "Once the FREEZE bit has been written to a logic 1 it can only be cleared to a logic 0 by a power-off to power-on cycle or a hardware reset" I tried to power-off-on the device but the FREEZE bit is still "1" what am I doing wrong?

Many Thanks,

HR

I'm using an S25FL256 with a Xilinx 7-series FPGA in single speed mode in a very simple design that works 99.9% of the time. But every once in a while something weird happens to the flash which makes our device stop working. This may occur during a power on/off but I don't know for sure

When I examine a "bad" unit I can immediately see something different from normal units--- the configuration register value is 0xEC. the configuration register value on a good unit is 0. What's more, if I try and change the configuration register value on a bad unit I get a programming error bit set and I can't talk to the memory after that. On a good unit I can change the configuration register value at will. On a bad unit I can still change the value of the status register, just not the configuration register.

The value of "0xEC" is particularly bad because it sets the latency to 0 and our software depends on the latency being 8 bits.

In our design, the "HOLD" and "WP" pins are held to Vcc.

Does anyone have any idea what could happening to our flash memories to cause the configuration register to get stuck in some strange bad value?

Any ideas would appreciated.

Thanks,

Andrew

Hi,

I am using S29GL032N11TFIV20 deivce with VCC = +3.3V and VIO = +2.5V. The data sheet defines the voltage range of these pins as VCC=2.7V-3.6V and VIO=1.65V-3.6V . DC Characteristics of the device described in the datasheet is also given a note for VIL, VIH , VOL and VOH levels as

5. VIO = 1.65–1.95 V or 2.7–3.6 V.

This condition does not include VIO = +2.5V. Kindly suggest what will be the VIL, VIH , VOL and VOH levels for VCC = +3.3V and VIO = +2.5V.

Thanks in Advance,

Surya.